An interleaver design of low latency for IEEE 802.11a Wireless LAN

IEEE 802.11a 무선 랜에 적용할 Low Latency 인터리버 설계

  • Shin, Bo-Young (Department of Electronics Engineering, Chonbuk National University) ;
  • Lee, Jong-Hoon (Department of Electronics Engineering, Chonbuk National University) ;
  • Park, June (Department of Electronics Engineering, Chonbuk National University) ;
  • Won, Dong-Youn (Department of Electronics Engineering, Chonbuk National University) ;
  • Song, Sang-Seob (Department of Electronics Engineering, Chonbuk National University)
  • 신보영 (전북대학교 전자공학과) ;
  • 이종훈 (전북대학교 전자공학과) ;
  • 박준 (전북대학교 전자공학과) ;
  • 원동윤 (전북대학교 전자공학과) ;
  • 송상섭 (전북대학교 전자공학과)
  • Published : 2003.11.01

Abstract

By minimizing the burst error of data and correcting the error, we can define the convolution coding and interleaving in IEEE 802.11a wireless tan system. Two step block interleaver was decided by coded bits per OFDM symbol and due to this it comes to the delay time in IEEE 802.11a. This is the point of the question which we must consider. We try to decrease the delay time by all 48-clock from interleavings, and we have proposed a way carried out the interleaving outputs per symbol. So in comparison with the existing interleaver, we can decrease the delay time in reading and writing data, as well as reduce the delay time of bit re-ordering per symbol. Also this scheme is apply in all x-QAM cases.

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