Audio Sampling Rate Conversion Block의 설계

Design of Audio Sampling Rate Conversion Block

  • 정혜진 (이화여자대학교 정보통신학과) ;
  • 심윤정 (이화여자대학교 정보통신학과) ;
  • 이승준 (이화여자대학교 정보통신학과)
  • 발행 : 2003.07.01

초록

This paper proposes an area-efficient FIR filter architecture for sampling rate conversion of hi-fi audio data. Sampling rate conversion(SRC) block converts audio data sampled at 96KHz down to 48KHz sampled data and vice versa. 63-tap FIR filter coefficients have been synthesized that gives 100dB stop band attenuation and 5.2KHz transition bandwidth. Time-shared filter architecture requires only one multiplier and accumulator for 63-tap filter operation. This results in huge hardware saving of up to 10~19 times smaller compared with traditional FIR structure.

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