Design of Passive Parameters for A Cascade Multilevel Inverter Based Static Var Compensator

직렬형 멀티레벨 인버터를 사용한 무효전력보상장치의 수동 파라메타 설계

  • 민완기 (조선이공대학 전기과) ;
  • 민준기 (충북대학교 전기전자공학부) ;
  • 최재호 (충북대학교 전기전자공학부)
  • Published : 2002.06.30

Abstract

This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H~bridge inverter(HBI). The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. From the mathematical model of the system, the design procedures of the circuit parameters Land C are presented in this thesis. To meet the specific total harmonic distortion(THD) and ripple factor of the capacitor voltage, the circuit parameters Land C are designed. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

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