Phase Detector Design for Inspection of a RLC Parallel Circuit on the Electronic Circuit Board

전자회로 보오드의 RLC 병렬회로 검사를 위한 위상검출회로 설계

This paper proposes the test method for the testing of a RLC parallel circuit on the electronic circuit board. This method utilizes a guarding circuit and a phase detection circuit. The guarding circuit separates electrically the tested device or circuit from printed circuit board. Phase detector estimates the phase difference from two signals, voltage and current. This method computes R. L and C value from phase difference($\theta$) and impedance value(Z) obtained by enforcing two other frequence stimulus under the guarding state.