Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Multi-Stage CMOS Charge Pump for Low-Voltage Memories

  • Kim, Young-Hee (Department of Electronic Engineering, Changwon National University) ;
  • Lim, Gyu-Ho (Department of Electronic Engineering, Changwon National University) ;
  • Yoo, Sung-Han (Department of Electronic Engineering, Changwon National University) ;
  • Park, Mu-Hun (Department of Electronic Engineering, Changwon National University) ;
  • Ko, Bong-Jin (Department of Electronic Engineering, Changwon National University) ;
  • Cho, Seong-Ik (Memory R&D Division, Hynix Semiconductor Inc.) ;
  • Min, Kyeong-Sik (Institute of Industrial Science, University of Tokyo) ;
  • Ahn, Jin-Hong (Memory R&D Division, Hynix Semiconductor Inc.) ;
  • Chung, Jin-Yong (Memory R&D Division, Hynix Semiconductor Inc.)
  • Published : 2002.07.01
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Abstract

To remedy both the degradation and saturation of the output voltages in the modified Dickson pump, a new multistage charge pump circuit is presented in this paper. Here using PMOS charge-transfer switches instead of NMOS ones eliminates the necessity of diode-configured output stage in the modified-Dickson pump, achieving the improved voltage pumping gain and its output voltages proportional to the stage numbers. Measurement indicates that VOUT/3VDD of this new pump circuit with two stages reaches to a value as high as 0.94V even with low VDD=1.0 V, strongly addressing that this scheme is very favorable at low-voltage memory applications.

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