Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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A Design of a Circular Pattern Recognition Circuit for a Binary Image with Variable Resolutions and Its FPGA Implementation

  • Fukushima, Tatsuya (Department of Electrical and Computer Engineering, Kumamoto University) ;
  • Furusawa, Koushirou (Department of Electrical and Computer Engineering, Kumamoto University) ;
  • Kitamura, Yoshiki (Department of Electrical and Computer Engineering, Kumamoto University) ;
  • Inoue, Takahiro (Department of Electrical and Computer Engineering, Kumamoto University)
  • Published : 2002.07.01
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Abstract

A fast algorithm for a circular pattern recognition from a binary edge image is proposed in this paper. The implementation of this algorithm onto an FPGA is designed using Verilog-HDL where a target device is Altera EPF10K100ARC240-3. For a 256 ${\times}$ 256-pixe1 binary edge image assuming a real watermelon in a greenhouse, improved circuit performance of the proposed design was confirmed.

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