Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)

The Institute of Electronics and Information Engineers (대한전자공학회)
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Hash Function Processor Using Resource Sharing for IPSec Chip

  • Kang, Young-Kyu (School of Electronic and Electrical Engineering, Kyungpook National University) ;
  • Kim, Dae-Won (School of Electronic and Electrical Engineering, Kyungpook National University) ;
  • Kwon, Taek-Won (School of Electronic and Electrical Engineering, Kyungpook National University) ;
  • Park, Jun-Rim (School of Electronic and Electrical Engineering, Kyungpook National University)
  • Published : 2002.07.01
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Abstract

This paper presents the implementation of hash functions for IPSEC chip. There is an increasing interest in high-speed cryptographic accelerators for IPSec applications such as VPNs (virtual private networks). Because diverse algorithms are used in Internet, various hash algorithms are required for IPSec chip. Therefore, we implemented SHA-1, HAS-160 and MD5 in one chip. These hash algorithms are designed to reduce the number of gates. SHA-1 module is combined with HAS-160 module. As the result, the required logic elements are reduced by 27%. These hash algorithms have been implemented using Altera's EP20K1000EBC652-3 with PCI bus interface.

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