Proceedings of the IEEK Conference (대한전자공학회:학술대회논문집)
- 2002.07b
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- Pages.936-939
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- 2002
A design technology for re-configurable MPU and software on FPGA
- Araki, H. (Graduate School of Engineering) ;
- Harashima, K. (Faculty of Engineering, Osaka Institute of Technology) ;
- Kutsuwa, T. (Faculty of Engineering, Osaka Institute of Technology)
- Published : 2002.07.01
Abstract
FPCA is the necessary device to design of hardware at present, it is researched on many ways of applying to design caused by expansion of capacity in recent years. One of these applying ways is SoC (System on a Chip) that is proposed for realizing the basic function of a system. For realizing SoC efficiently, IP (Intellectual property) is very important and developed for re-use of hardware. A MPU for built-in exists as an IP. But almost of MPUs at present as an IPs are lengthy and large-scale for using embedded-application. Furthermore, the function of executing specific treatment critically is required to embedded MPU. We propose a flexible and small scale MPU and its design method.
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