Design of Fast Parallel Floating-Point Multiplier using Partial Product Re-arrangement Technique

효율적인 부분곱의 재배치를 통한 고속 병렬 Floating-Point 고속연산기의 설계

Nowadays ARM7 core is used in many fields such as PDA systems because of the low power and low cost. It is a general-purpose processor, designed for both efficient digital signal processing and controller operations. But the advent of the wireless communication creates a need for high computational performance for signal processing. And then This paper has been designed a floating-point multiplier compatible to IEEE-754 single precision format for ARMTTDMI performance improvement.