대한전기학회:학술대회논문집 (Proceedings of the KIEE Conference)
- 대한전기학회 2001년도 하계학술대회 논문집 B
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- Pages.717-719
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- 2001
삼상형 dc reactor형태 한류기의 단락회로실험을 위한 시뮬레이션
Simulation of the Three-phase DC Reactor Type Fault Current Limiter for the Short-circuit Test
- 이응로 (연세대학교 전기.전자공학과) ;
- 이승제 (연세대학교 전기.전자공학과) ;
- 이찬주 (연세대학교 전기.전자공학과) ;
-
고태국
(연세대학교 전기.전자공학과) ;
- 현옥배 (전력연구원)
- Lee, Eung-Ro (Dept. of Electrical & Electronic Eng. Yonsei University) ;
- Lee, Seung-Je (Dept. of Electrical & Electronic Eng. Yonsei University) ;
- Lee, Chan-Joo (Dept. of Electrical & Electronic Eng. Yonsei University) ;
-
Ko, Tae-Kuk
(Dept. of Electrical & Electronic Eng. Yonsei University) ;
- Hyun, Ok-Bae (Kepri)
- 발행 : 2001.07.18
초록
This paper deals with simulation of the three-phase dc reactor type fault current limiter(FCL). This is a preliminary step to develop the FCL's faculties for an application to high voltage transmission line. A three-phase dc reactor type FCL consists of transformers, diodes, and a superconducting coil. By this simulation for the short-circuit test we can investigate the safety of FCL's elements. And, result of simulation will contribute parameter toward optimal design.
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