Track Circuit Topology Design by Double Vertex Graph Algorithm

Double Vertex 그래프에 의한 궤도회로 토플로지의 생성

A representation technique of a given track topology is required by many software applications in railway technology such as signalling system simulator. To achieve these, the concept of double vertex graph architecture is proposed. These are composed of pairs of vertices and node between the single vertices. Double vertex graph architecture can be understood as a extension of classical graphs. In developed railway signalling simulation software, it is shown that track topology can be represented by proposed algorithm in a efficient way. Especially it makes sure that these are suitable technique for representing and implementing of switch, routes which can be introduced some mistake in classical graph algorithm.