Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)

The Korean Institute of Electrical Engineers (대한전기학회)
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Representation of Temporal Logic Framework Using Petri Net

Petri Net을 이용한 시간논리 구조의 표현

  • Kim, Jung-Chul (Dept. of Control & Instrumentation Engineering, Wonkwang Univ.) ;
  • Mo, Young-Seung (Dept. of Control & Instrumentation Engineering, Wonkwang Univ.) ;
  • Kim, Jin-Kwon (Dept. of Control & Instrumentation Engineering, Wonkwang Univ.) ;
  • Hwang, Hyung-Soo (Dept. of Control & Instrumentation Engineering, Wonkwang Univ.)
  • 김정철 (원광대학교 공과대학 제어계측공학과) ;
  • 모영승 (원광대학교 공과대학 제어계측공학과) ;
  • 김진권 (원광대학교 공과대학 제어계측공학과) ;
  • 황형수 (원광대학교 공과대학 제어계측공학과)
  • Published : 2000.11.25
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Abstract

Temporal Logic Frameworks is convenient to represent temporal relation. It is useful to represent a dynamic properties of Discrete Event Dynamic Systems. Also, it is convenient to express a current and next state of event using logical representation. Because the teachability tree of the Temporal Logic Frameworks is very complexity it is difficult to understand. In this paper, we defined some rules to represent Temporal Logic Frameworks by Petri Net and proposed am method of the representation of them Petri Net for the Temporal Logic Frameworks. An example are used to demonstrate the feasibility of this method.

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