Minimization of Spill Code Insertion by Register Constraint Analysis for Code Generation for Application Specific DSPs

Application specific DSPs often employ irregular datapath structures with distributed registers. In the scheduling phase of retargetable compilation, resolution of register usage conflicts comes to be a new constraint for such datapaths. This paper presents a method of register constraint analysis which attempts to minimize the number of the spill codes required for resolving the register usage conflicts. It searches for a set of ordering restrictions among operations which sequentialize the lifetimes of the values residing in the same register as much as possible and thus minimize the number of the register conflict. Experimental results show that a combination of the proposed register constraint, analysis and list-based scheduling reduces the number of the register spills into 25%.