Discrete Cosine Transformer with Variable-Length Basis Vector for MPEG-4 Video Codec

  • Kuroda, Ryo (Department of Information Systems Engineering, Facylty of Engineering, Osaka Unviersity) ;
  • Fujita, Gen (Department of Information Systems Engineering, Facylty of Engineering, Osaka Unviersity) ;
  • Onoye, Takao (Department of Communications and Computer Engineering Kyoto University) ;
  • Shirakawa, Isao (Department of Information Systems Engineering, Facylty of Engineering, Osaka Unviersity)
  • Published : 2000.07.01

Abstract

It this paper a VLSI architecture of the Shape-Adaptive Discrete Cosine Transform (SA-DCT) is described, which can be employed dedicatedly for MPEG-4 video codec. Adopting a fast DCT algorithm, the number of multipliers can be reduced by half in comparison with a conventional algorithm. This SA-DCT core with a small additional amount of hardware can perform the SA-Inverse DCT (SA-IDCT) by sharing multipliers and a transportation memory. The proposed SA-DCT core is integrated with 40,000 gates by using 0.35$mu$m triple-metal CMOS technology, which operates at 20 Mhz, and hence enables the realtime codec of CIF ($352{\times}288$ pixels) pictures.

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