대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2000년도 ITC-CSCC -2
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- Pages.653-656
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- 2000
Transformation of UML Diagrams into Interval Temporal Logic and Petri nets for Real-Time Systems Design
- Gushiken, Ryuji (Department of Information Engineering, University of The Ryukyus) ;
- Nakamura, Morikazu (Department of Information Engineering, University of The Ryukyus) ;
- Kono, Shinji (Department of Information Engineering, University of The Ryukyus) ;
- Onaga, Kenji (Okinawa Research Center, Telecommunications Advancement Organization)
- 발행 : 2000.07.01
초록
We consider, in this paper, a UML-based design support system for real-time systems. However, the UML does not include any notion for verification of timing constraints. We presents transformation algorithms, as a function of the support system, of UML descriptions into Petri nets and Interval Temporal Logic models, which are very powerful for the verification. This paper shows also transformation example for simple elevator system.
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