대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 2000년도 ITC-CSCC -1
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- Pages.406-409
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- 2000
High Throughput Implementation of RLS Algorithm Using Fewer Processing Elements
- Niki, Takeo (Dept. of Electrical Engineering, Tokyo Metropolitan Univ.) ;
- Yamada, Rikita (Dept. of Electrical Engineering, Tokyo Metropolitan Univ.) ;
- Nishikawa, Kiyoshi (Dept. of Electrical Engineering, Tokyo Metropolitan Univ.) ;
- Kiya, Hitoshi (Dept. of Electrical Engineering, Tokyo Metropolitan Univ.)
- 발행 : 2000.07.01
초록
This paper proposes a method that enables us to implement the recursive least squares (RLS) algorithm at, high throughput rate using fewer processing elements (PEs). It is known that the pipeline processing can provide a high throughput rate. But, pipelining is effective only when enough number of PEs are available. The proposed method achieves high throughput rate using a few PEs. The effectiveness of the proposed method is verified through simulations on programmable digital signal processors (in the following, DSP processors).
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