A Study on Optimized Technology Mapping for FPGA

FPAG를 위한 최적화된 기술 매핑에 관한 연구

We are studied on the performance optimized synthesis and mapping of design on to one or more FPGA device. our multi-phased approach optimized the key parameters that affect performance by adequately modeling the impact on wire length, routability, and performance during technology mapping to produce designs that have high performance and high routability potential.