Proceedings of the KIEE Conference (대한전기학회:학술대회논문집)
- 2000.07a
- /
- Pages.28-30
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- 2000
Enhancement of Interface Flow Limit using Static Synchronous Series Compensator(SSSC)
SSSC 투입에 따른 연계선로의 송전운용한계 개선
-
Kim, Seul-Ki
(School of Electrical Engineering, Korea University)
;
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Song, Hwa-Chang
(School of Electrical Engineering, Korea University)
;
- Lee, Byong-Jun (School of Electrical Engineering, Korea University) ;
- Kwon, Sae-Hyuk (School of Electrical Engineering, Korea University) ;
-
Chang, Byung-Hoon
(KEPRI)
- Published : 2000.07.17
Abstract
This paper introduces a power flow model of SSSC for voltage stability study. The SSSC model is obtained from the injection model of voltage source inverter by adding the condition that SSSC injection voltage is in quadrature with current of SSSC-installed branch. This model is incorporated into modified CPF algorithm to study effects of SSSC on the security-constrained interface flow limit. Determination of interface flow limit is simply briefed. In case study a 771-bus real system is used to show that SSSC can improve interface flow limit in terms of voltage stability.
Keywords