Proceedings of the Korean Institute of Information and Commucation Sciences Conference (한국정보통신학회:학술대회논문집)
- 1999.05a
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- Pages.407-410
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- 1999
Implementation of Radix-2 structure to reduce chip size
Chip면적 감소를 위한 Radix-2구조 구현
Abstract
Viterbi decoder is implemented with a Radix-4 architecture at 0.5
0.5
Keywords