Abstract
The Si-SiO$_2$interface trap and nitride bulk trap distribution of SONOSFET(polysilicon-oxide-nitride-oxide-semiconductor)NVSM(nonvolatile semiconductor memory) cell were investigated by single charge pumping method. The used device was fabricated by 0.35 7m standard logic fabrication including the ONO cell process. This ONO dielectric thickness is tunnel oxide 24 $\AA$, nitride 74 $\AA$, blocking oxide 25 $\AA$, respectively. Keeping the pulse base level in accumulation and pulsing the surface into inversion with increasing amplitudes, the charge pumping current flow from the single junction. Using the obtained I$_{cp}$-V$_{h}$ curve, the local V$_{t}$ distribution, doping concentration, lateral interface trap distribution and lateral memory trap distribution were extracted. The maximum N$_{it}$($\chi$) of 1.62$\times$10$^{19}$ /cm$^2$were determined.mined.d.