Proceedings of the Korean Vacuum Society Conference (한국진공학회:학술대회논문집)
- 1999.07a
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- Pages.79-79
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- 1999
Microfabrication of Submicron-size Hole on the Silicon Substrate using ICP etching
- Lee, J.W. (Department of Physics, Sun Moon University) ;
- Kim, J.W. (Department of Physics, Sun Moon University) ;
- Jung, M.Y. (Department of Physics, Sun Moon University) ;
- Kim, D.W. (Department of Physics, Sun Moon University) ;
- Park, S.S. (Department of Physics, Sun Moon University)
- Published : 1999.07.01
Abstract
The varous techniques for fabrication of si or metal tip as a field emission electron source have been reported due to great potential capabilities of flat panel display application. In this report, 240nm thermal oxide was initially grown at the p-type (100) (5-25 ohm-cm) 4 inch Si wafer and 310nm Si3N4 thin layer was deposited using low pressure chemical vapor deposition technique(LPCVD). The 2 micron size dot array was photolithographically patterned. The KOH anisotropic etching of the silicon substrate was utilized to provide V-groove formation. After formation of the V-groove shape, dry oxidation at 100
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