대한전자공학회:학술대회논문집 (Proceedings of the IEEK Conference)
- 대한전자공학회 1998년도 추계종합학술대회 논문집
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- Pages.1009-1012
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- 1998
연결-에지 추가 기법을 이용한 클락 스큐 최적화
Clock Skew Optimization Using Link-Edge Insertion
초록
An efficient algorithm for clock skew optimization is proposed in this paper. It construct a new clock routing topology which is the generalized graph model while previous methods uses tree-structured routing topology. Edge-insertion technique is used in order to reduce the clock skew. A link-edge is inserted repeatedly between two sinks whose delay difference is large and the distance is small. As a result, the delay of a sink which has the longer delay is decreased and the clock skew is reduced. The proposed algorithm is implemented in C programming language. From the experimental results, we can get the total wire length minimization under the given skew bound.
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