A Study on Converter Circuit Analysis Using GTO Device Modeling

GTO DEVICE의 MODELING에 의한 변환 회로 해석

  • Seo, Young-Soo (Department of Electrical Engineering, Myong-Ji University) ;
  • Sung, Dae-Yong (Department of Electrical Engineering, Myong-Ji University) ;
  • Cho, Moon-Taek (Department of Electrical Engineering, Myong-Ji University) ;
  • Lee, Sang-Bong (Department of Electrical Engineering, Myong-Ji University)
  • 서영수 (명지대학교 전기공학과) ;
  • 성대용 (명지대학교 전기공학과) ;
  • 조문택 (명지대학교 전기공학과) ;
  • 이상봉 (명지대학교 전기공학과)
  • Published : 1992.07.23

Abstract

A numerical model of a three junction device is presented. It allows the simulation of the external characteristics of the PNPN family devices and in this work the simulation of gate turn-off thyristor(GTO) is particularly considered. The proposed PNPN device simulation model solves all the drawbacks presented by the previous work, simulates the GTO well, and fulfills.

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