• Title, Summary, Keyword: trinomial equations

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Design of an Efficient Digit-Serial Multiplier for Elliptic Curve Cryptosystems (타원곡선 암호 시스템에 효과적인 digit-serial 승산기 설계)

  • 이광엽;위사흔;김원종;장준영;정교일;배영환
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.11 no.2
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    • pp.37-44
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    • 2001
  • In this paper, an efficient architecture for the ECC multiplier in GF(2") is proposed. We give a design example for the irreducible trinomials $x_{193}\;+\;x_{15}\;+\;1$. In hardware implementations, it is often desirable to use the irreducible trinomial equations. A digit-serial multiplier with a digit size of 32 is proposed, which has more advantages than the 193bit serial LFSR architecture. The proposed multiplier is verified with a VHDL description using an elliptic curve addition. The elliptic curve used in this implementation is defined by Weierstrass equations. The measured results show that the proposed multiplier it 0.3 times smaller than the bit-serial LFSR multiplier.lier.

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Design of Digit-serial Circuits for Cryptography Module on Smart cards (스마트카드의 암호화모듈 구현에 적합한 Digit-Serial 유한체 연산기 설계)

  • 하진석;이광엽;김원종;장준영;정교일;배영환
    • Proceedings of the IEEK Conference
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    • pp.337-340
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    • 2001
  • In this Paper, 3 digit-Serial multilier With 3 digit size of 32 is proposed, which has more advantages than the 193bit serial LFSR architecture. We give a design example for the irreducible trinomials $x^{193}$$x^{15+1}$. In hardware implementations, it is often desirable to use the irreducible trinomial equations. The proposed multiplier is verified with a VHDL description using an elliptic curve addition. The measured results show that the proposed multiplier is 0.3 times smaller than the bit-serial LFSR multiplier..

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