• Title, Summary, Keyword: program voltage

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Design Of practical Voltage Stability Analysis Program (상용 전압안정도 해석 프로그램 설계)

  • Shin, Man-Cheol;Oh, Sung-Kyun;Kim, Kern-Joong;Hwang, In-Joon;Park, Hyun-Shin
    • Proceedings of the KIEE Conference
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    • pp.155-157
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    • 2004
  • Voltage control and stability problems are very important in the electric utility industry. But there is no voltage stability analysis program which has reliability as commercial program in domestic. We are developing a practical voltage stability analysis program. In this paper, we will study the existing commercial program and then discuss design of practical analysis tool.

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The Voltage drops computation program on distributed random loads (분산부하 전압강하 계산 프로그램)

  • Kang, Cha-Nyeong
    • Proceedings of the KIEE Conference
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    • pp.12-15
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    • 2005
  • The subject of this research is not only to examine effects on electrical wiring that voltage drops make in low voltage load facilities found in apartments, buildings street lightings, factories, and etc, but also to discuss the voltage drops computation program on distributed random loads to optimize their safety and economy.

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Effects of Offset Gate on Programing Characteristics of Triple Polysilicon Flash EEPROM Cell

  • Kim, Nam-Soo;Choe, Yeon-Wook;Kim, Yeong-Seuk
    • Journal of Electrical Engineering and information Science
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    • v.2 no.3
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    • pp.132-138
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    • 1997
  • Electrical characteristics of split-gate flash EEPROM with triple polysilicon is investigated in terms of effects of floating gate and offset gate. In order to search for t the effects of offset gate on programming characteristics, threshold voltage and drain current are studied with variation of control gate voltage. The programming process is believed to depend on vertical and horizontal electric field as well as offset gate length. The erase and program threshold voltage are found to be almost constant with variation of control gate voltage above 12V, while endurance test indicates degradation of program threshold voltage. With increase of offset gate length, program threshold voltage becomes smaller and the drain source voltage just after program under constant control gate voltage becomes higher.

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Jeju area's Voltage Stability Analysis which use the Real Time Voltage Stability Analysis Program (실시간 전압안정도 프로그램을 이용한 제주지역 전압안정도)

  • Lee, Sung-Woo;Ahn, Kyo-Sang;Seo, Dong-Wan;Jang, Moon-Jong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.10
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    • pp.1387-1392
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    • 2012
  • These days people use a lot of electric power, because industry advancement and a standard of living is elevated. So voltage stability analysis and control problems are very important in these days. U.S.A has already developed voltage stability analysis program, and use it on power transmission scheme such as generator overhaul, transmission line off and so on. So voltage stability analysis is more and more interested in Korea, too. In this paper, we introduce a standard theory of voltage stability analysis and real time voltage stability analysis program that use sPMU(Satellite Phasor Measurement Unit). And we also introduce the calculation result about voltage stability in Jeju power transmission system.

The Improved Electrical Endurance(Program/Erase Cycles) Characteristics of SONOS Nonvolatile Memory Device (SONOS 비휘발성 기억소자의 향상된 프로그램/소거 반복 특성)

  • 김병철;서광열
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.1
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    • pp.5-10
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    • 2003
  • In this study, a new programming method to minimize the generation of Si-SiO$_2$interface traps of SONOS nonvolatile memory device as a function of number of porgram/erase cycles was proposed. In the proposed programming method, power supply voltage is applied to the gate. forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim(MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and dram are left open. Also, the asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics or SONOS devices because electrical stress applied to the Si-SiO$_2$interface is reduced due to short program time.

Development of a Voltage Sag Assessment Program Considering Generator Scheduling and Voltage Tolerance (발전기 스케줄링과 부하 전압민감도를 고려한 순간전압강하 평가 프로그램 개발)

  • Park, Chang-Hyun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.4
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    • pp.92-100
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    • 2009
  • This paper presents a voltage sag assessment program. The program provides various functions for stochastic assessment of voltage sags such as short-circuit analysis, the determination of the area of vulnerability and the calculation of expected sag frequency(ESF). Effective data visualization functions based on computer graphics and animation were also implemented in the developed program. In this paper, the concept of voltage sag assessment and the assessment method considering generator scheduling and time-varying fault rates are presented. The influence of generator scheduling and time-varying fault rates on voltage sag prediction is also described by performing case studies using the developed program.

Development of Monitoring Program for Detecting Current and Voltage Signals for Series Arc (직렬아크에 대한 전류 및 전압 신호분석이 가능한 Monitoring Program 개발)

  • Kim, Doo-Hyun;Park, Jong-Young;Kim, Sung-Chul;Lee, Jong-Ho
    • Journal of the Korean Society of Safety
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    • v.25 no.2
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    • pp.29-34
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    • 2010
  • This paper is aimed to develop monitoring software for detecting the characteristics of current and voltage signals for series arc on electric wire. In order to attain this purpose, the characteristics of series arc were analyzed by the current and voltage signals on electric wire which were installed, and also analyzed by the changes of RMS, instantaneous of waveform value in time domain and THD in frequency domain. Monitoring program which analyze the signal was developed by Labview which can analyze in time domain and frequency domain, and save data. Experimental setup for detecting verification of monitoring program was composed loads of a lamp, an electric heater and an electric fan loads which were usually using. Measurement points for detecting verification of monitoring program were selected at both the panel board and the arc generator at the same time. As results of the experiments by monitoring program, the arc current waveform showed the same characteristic in all measurement points of all load. But the arc voltage waveform was different in each measurement point. When arc occurred, the THD of current value increased above 20%. The results of this study will be effectively used in developing the preventive system of electric fire by series arc.

Deterioration Analysis for High Voltage Motor Using Insulation Diagnostic Database Program (절연진단 데이타베이스 프로그램을 이용한 고압전동기 열화 분석)

  • Kong, Tae-Sik;Kim, Hee-Dong;Lee, Young-Jun;Ju, Yong-Ho
    • Proceedings of the KIEE Conference
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    • pp.100-102
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    • 2005
  • This paper is purpose to introduce the database management program of insulation tests for high voltage rotating machines. KEPRI has carried out insulation tests for high voltage equipment since 1998, the number of tests grow larger every year. It is difficult to manage the numerous test results, so we developed the insulation diagnostic database program. The features of this program are an easy-search test result and making a graph of AC, tan${\Delta}$ test. the most useful function is the trend management. Using the trend function, we can find the aging deterioration for high voltage machines easily.

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A Study on Constructing the Prediction System Using Data Mining Techniques to Find Medium-Voltage Customers Causing Distribution Line Faults (특별고압 수전설비 관리에 데이터 마이닝 기법을 적용한 파급고장 발생가능고객 예측시스템 구현 연구)

  • Bae, Sung-Hwan;Kim, Ja-Hee;Lim, Han-Seung
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.12
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    • pp.2453-2461
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    • 2009
  • Faults caused by medium-voltage customers have been increased and enlarged their portion in total distribution faults even though we have done many efforts. In the previous paper, we suggested the fault prediction model and fault prevention method for these distribution line faults. However we can't directly apply this prediction model in the field. Because we don't have an useful program to predict those customers causing distribution line faults. This paper presents the construction method of data warehouse in ERP system and the program to find customers who cause distribution line faults in medium-voltage customer's electric facility management applying data mining techniques. We expect that this data warehouse and prediction program can effectively reduce faults resulted from medium-voltage customer facility.

A New Programming Method of Scaled SONOS Flash Memory Ensuring 1$\times$10$^{6}$ Program/Erase Cycles and Beyond (1x10$^{6}$ 회 이상의 프로그램/소거 반복을 보장하는 Scaled SONOS 플래시메모리의 새로운 프로그래밍 방법)

  • 김병철;안호명;이상배;한태현;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • pp.54-57
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    • 2002
  • In this study, a new programming method, to minimize the generation of Si-SiO$_2$ interface traps of scaled SONOS flash memory as a function of number of program/erase cycles has been proposed. In the proposed programming method, power supply voltage is applied to the gate, forward biased program voltage is applied to the source and the drain, while the substrate is left open, so that the program is achieved by Modified Fowler-Nordheim (MFN) tunneling of electron through the tunnel oxide over source and drain region. For the channel erase, erase voltage is applied to the gate, power supply voltage is applied to the substrate, and the source and drain are open. A single power supply operation of 3 V and a high endurance of 1${\times}$10$\^$6/ prograss/erase cycles can be realized by the proposed programming method. The asymmetric mode in which the program voltage is higher than the erase voltage, is more efficient than symmetric mode in order to minimize the degradation characteristics of scaled SONOS devices because electrical stress applied to the Si-SiO$_2$ interface is reduced by short programming time.

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