• Title, Summary, Keyword: TRC

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The Determination of TRC using an Electrochemical Method (II: Pt electrode) (전기화학적 방법의 TRC(Total residual chlorine) 측정 연구(II: Pt전극 이용))

  • Lee, JunCheol;Pak, DaeWon
    • Journal of Korean Society on Water Environment
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    • v.30 no.3
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    • pp.304-310
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    • 2014
  • The conventional methods for total residual chlorine such as iodometry and DPD colorimetric can cause secondary pollution due to additional agents, also have a wide error range. As for alternative, electrochemical method can measure TRC(Total residual chlorine), and is not required as additional agents, also very suitable for using the fields of ballast water because test time is relatively fast. Therefore, this study was investigated for changing charge by agitation, salt concentration, and temperature change. Charge showed differences based on changes of reduction peak with or without agitation. In contrast, TRC and charge were well correlated in constant agitation speed. As TRC and charge were analyzed with high correlations in constant salinity and temperature of ocean, thereby conductivity was firstly measured, and charge had high correlation for TRC in spite of changing salinity and temperature Pt electrode revealed high reliability ($r^2=0.960$) because it was rarely effected by TRC, On the other hand, Au electrode appeared inadequate ($r^2=0.767$) to use sensor in less than 1.0 ppm of TRC. For high accuracy and detection of TRC, Pt and Au electrodes for test time were, respectively, 14 and 22 seconds. As a result, Pt electrode was more valuable than Au electrode in terms of response time.

The Determination of TRC using an Electrochemical Method (I: Au electrode) (전기화학적 방법의 TRC(Total residual chlorine) 측정 연구(I: Au전극 이용))

  • Lee, JunCheol;Pak, DaeWon
    • Journal of Korean Society on Water Environment
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    • v.30 no.3
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    • pp.298-303
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    • 2014
  • We measured by electrochemical method for TRC (total residual chlorine) in ocean. From the results of Au electrode used for working electrode through cyclic voltammetry test, we obtained charge in voltage ranged from 0.0V-1.0V, and analyzed correlations of charge for TRC. Reduction peak TRC was investigated to be approximately 0.65 V vs. Ag/AgCl, and in the case that salt concentrations and temperatures in ocean appeared different, charge was analyzed for being different in the same TRC. However, in the case that each condition was constant, charge was measured at highly correlations for TRC.

Chitosan-Based Film of Tyrothricin for Enhanced Antimicrobial Activity against Common Skin Pathogens Including Staphylococcus aureus

  • Han, Sang Duk;Sung, Hyun Jung;Lee, Ga Hyeon;Jun, Joon-Ho;Son, Miwon;Kang, Myung Joo
    • Journal of Microbiology and Biotechnology
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    • v.26 no.5
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    • pp.953-958
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    • 2016
  • Chitosan-based film-forming gel is regarded as a promising vehicle for topical delivery of antimicrobial agents to skin wounds, since it protects from microbial infection and the cationic polymer itself possesses antibacterial activity. In this study, possible synergistic interaction against common skin pathogens between the cationic polymer and tyrothricin (TRC), a cyclic polypeptide antibiotic, was investigated, by determining the concentration to inhibit 90% of bacterial isolates (MIC). The addition of the polysaccharide to TRC dramatically reduced the MIC values of TRC by 1/33 and 1/4 against both methicillin-resistant and methicillin-susceptible Staphylococcus aureus, respectively. The synergism of TRC and chitosan combination against both strains was demonstrated by the checkerboard method, with a fractional inhibitory concentration index below 0.5. Moreover, co-treatment of TRC and chitosan exhibited antibacterial activity against Pseudomonas aeruginosa, due to the antibacterial activity of chitosan, whereas TRC itself did not inhibit the gram-negative bacterial growth. These findings suggested that the use of chitosan-based film for topical delivery of TRC could be an alternative to improve TRC antimicrobial activity against strains that are abundant in skin wounds.

Linearity-Distortion Analysis of GME-TRC MOSFET for High Performance and Wireless Applications

  • Malik, Priyanka;Gupta, R.S.;Chaujar, Rishu;Gupta, Mridula
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.3
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    • pp.169-181
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    • 2011
  • In this present paper, a comprehensive drain current model incorporating the effects of channel length modulation has been presented for multi-layered gate material engineered trapezoidal recessed channel (MLGME-TRC) MOSFET and the expression for linearity performance metrics, i.e. higher order transconductance coefficients: $g_{m1}$, $g_{m2}$, $g_{m3}$, and figure-of-merit (FOM) metrics; $V_{IP2}$, $V_{IP3}$, IIP3 and 1-dB compression point, has been obtained. It is shown that, the incorporation of multi-layered architecture on gate material engineered trapezoidal recessed channel (GME-TRC) MOSFET leads to improved linearity performance in comparison to its conventional counterparts trapezoidal recessed channel (TRC) and rectangular recessed channel (RRC) MOSFETs, proving its efficiency for low-noise applications and future ULSI production. The impact of various structural parameters such as variation of work function, substrate doping and source/drain junction depth ($X_j$) or negative junction depth (NJD) have been examined for GME-TRC MOSFET and compared its effectiveness with MLGME-TRC MOSFET. The results obtained from proposed model are verified with simulated and experimental results. A good agreement between the results is obtained, thus validating the model.

Strength Properties of Concrete According to Types of High Early Strength Cement and Curing Method (조강형 시멘트의 종류 및 양생방법에 따른 콘크리트의 강도특성)

  • Chang, Chun-Ho;Lee, Wang-Sup;Jung, Yong-Wook;Chung, Youn-In
    • Journal of the Korean Recycled Construction Resources Institute
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    • v.5 no.1
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    • pp.76-84
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    • 2017
  • This study selected a method which uses high early strength cement as a way to reduce the curing time and curing energy source of concrete secondary products and reviewed the improvement in the initial strength of concrete secondary products setting the target strength of the concrete capable of removing the form to 15MPa and the curing time to 6 hours. As a result of the test, the only specimen which achieved the form removal strength of 15 MPa only through atmospheric curing within the target curing time of 6hours was ACC-100, and the specimens of TRC-100 and TRC-50 satisfied the values of 6 hours and 15MPa through steam curing. However, we could see that it was difficult to secure workability in the case of the specimen of ACC-100 due to its high rapid setting property and a retarder such as anhydrous citric acid was required to be used to improve the workability. When we look into the pattern following changes in the water to binder ratio, while, in the case of stream curing, OPC-100, TRC-100, and TRC-50 were all found to satisfy achievement of the form removal strength within 6hours as the water to binder ratio decreased, in the case of atmospheric curing, TRC-100, and TRC-50 achieved 15MPa within 12hours.

Decomposed Bus Invert Coding Scheme For Low Power Circut Design (저전력 회로 설계를 위한 분할 버스-인버트 코딩 기법)

  • 김태환;홍성백;엄준형;김영대;여준기
    • Proceedings of the Korean Information Science Society Conference
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    • pp.27-29
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    • 2000
  • 버스-인버트 코딩 기법은 버스에서의 연속된 데이터 전송시 발생하는 데이터 값의 천이를 줄이는 기법이다. 기존의 방식에서는 전체버스 라인이나 그중의 한 일부분만에 버스-인터트 코딩을 적용했었던 것과는 달리, 우리의 기법은 버스 라인들을 몇 개의 묶음으로 분할하여, 각 묶음에 대해 독립적으로 버스-인버트 코딩을 적용하여 데이터 값의 천이를 최소화 하려고 한다. 실험을 통해서 우리의 기법은 데이터 값의 천이를 전체적으로 10-50% 감소시킬수 있음을 나타났다.

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A Timing-Driven Synthesis of Arithmetic Circuits using Carry-Save-Adders (캐리-세이브 가산기를 이용한 지연시간 최적화를 위한 연산기 합성)

  • 김태환;엄준형;김영태;여준기;홍성백
    • Proceedings of the Korean Information Science Society Conference
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    • pp.18-20
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    • 2000
  • 캐리-세이브 가산기(CSA)는 연산식의 빠른 수행을 위해 가장 일반적으로 쓰이는 연산기중에 하나이다. 일반적인 CSA 적용의 근본적인 한계로는, 연산 회로중에 바로 덧셈 연산으로 변환되는 부분만이 적용이 가능하다는 사실이다. 이러한 제한점을 극복하기 위하여, 우리는 간단하고도, 효율적인 CSA 변환 방법을 제시한다. 이들은(1) 멀티플랙서를 포함한 최적화, (2) 회로 경계를 포함한 최적화, (3) 곱셈기를 포함한 최적화이다. 이러한 방법을 포함하여, 우리는 전체적인 회로에서 CSA를 충분히 사용할수 있는 새로운 지연시간 최적화를 목표로 하는 CSA 변환 방법을 만들어 내었다. 실험에서는 실제적인 여러 회로에 대해 제시된 방법이 효율적임을 보였다.

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Optimal Bit-level Arithmetic Optimization for High-Speed Circuits (고속 회로를 위한 비트 단위의 연산 최적화)

  • 엄준형;김영태;김태환;여준기;홍성백
    • Proceedings of the Korean Information Science Society Conference
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    • pp.21-23
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    • 2000
  • 고속 회로 합성에 있어서, Wallace 트리 스타일은 연산을 위한 가장 효율적인 수행방식의 하나로 인식되어 졌다. 그러나, 이러한 방법은 빠른 곱셈기의 수행이나 여러 가지 연산수행에 있어, 입력 시그널을 고려하지 않은 일반적인 구조로 수행되어졌다. 본 논문은 연산기에 있어서 이러한 제한점을 극복하는 문제를 다룬다. 우리는 캐리-세이브 방법을 덧셈, 뺄셈, 곱셈이 혼합되어 일T는 일반적인 연산 회로에 적용한다. 그 결과 효율적인 회로를 생성하며, 시그널들이 임의의 도달시간에 대해 회로의 도달시간을 최적화 한다. 또한, 우리는 최적 지연시간의 캐리-세이브 가산회로를 생성하는 효율적인 알고리즘을 제안하였다. 우리는 이러한 최적화 방법을 여러 고속 디지털 필터에 적용시켜 보았고 이는 기존의 비트 단위가 아닌 캐리-세이브 수행방법보다 5%에서 30%사이의 수행시간 향상을 가져왔다.

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