• Title, Summary, Keyword: Sequence Control

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One-Cycle Control Strategy for Dual-Converter Three-Phase PWM Rectifier under Unbalanced Grid Voltage Conditions

  • Xu, You;Zhang, Qingjie;Deng, Kai
    • Journal of Power Electronics
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    • v.15 no.1
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    • pp.268-277
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    • 2015
  • In this paper, a dual-converter three-phase pulse width modulation (PWM) rectifier based on unbalanced one-cycle control (OCC) strategy is proposed. The proposed rectifier is used to eliminate the second harmonic waves of DC voltage and distortion of line currents under unbalanced input grid voltage conditions. The dual-converter PWM rectifier employs two converters, which are called positive-sequence converter and negative-sequence converter. The unbalanced OCC system compensates feedback currents of positive-sequence converter via grid negative-sequence voltages, as well as compensates feedback currents of negative-sequence converter via grid positive-sequence voltages. The AC currents of positive- and negative-sequence converter are controlled to be symmetrical. Thus, the workload of every switching device of converter is balanced. Only one conventional PI controller is adopted to achieve invariant power control. Then, the parameter tuning is simplified, and the extraction for positive- and negative-sequence currents is not needed anymore. The effectiveness and the viability of the control strategy are demonstrated through detailed experimental verification.

Current Control in Cascaded H-bridge STATCOM for Electric Arc Furnaces (전기로용 다단 H-브릿지 STATCOM의 전류제어)

  • Kwon, Byung-Ki;Jung, Seung-Ki;Kim, Tae-Hyeong;Kim, Yun-Hyun
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.1
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    • pp.19-30
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    • 2015
  • A static synchronous compensator (STATCOM) applied to rapidly changing, highly unbalanced loads such as electric arc furnaces (EAFs), requires both positive-sequence and negative-sequence current control, which indicates fast response characteristics and can be controlled independently. Furthermore, a delta-connected STATCOM with cascaded H-bridge configuration accompanying multiple separate DC-sides, should have high performance zero-sequence current control to suppress a phase-to-phase imbalance in DC-side voltages when compensating for unbalanced load. In this paper, actual EAF data is analyzed to reflect on the design of current controllers and a pioneering zero-sequence current controller with a superb transient performance is devised, which generates an imaginary -axis component from the presumed response of forwarded reference. Via simulation and experiments, the performance of the positive, negative, and zero-sequence current control of a cascaded H-bridge STATCOM for EAF is verified.

A Design Method of Discrete Time Learning Control System (이산시간 학습제어 시스템의 설계법)

  • 최순철
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.13 no.5
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    • pp.422-428
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    • 1988
  • An iterative learning control system is a control system which makes system outputs follow desired outputs by iterating its trials over a finite time interval. In a discrete time system, we proposed one method in which present control inputs can be obtained by a linear combination of the input sequence and time-shifted error sequence at previous trial. In contrast with a continous time learning control system which needs differential opreration of an error signal, the time shift operation of the error sequence is simpler in a computer control system and its effectiveness is shown by a simulation.

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Automatic generation of sequence control programs

  • Gohi, Tetuji;Kojima, Fumio;Obana, Hideo;Sugimori, Hisayosi;Tsukimoto, Hirosi
    • 제어로봇시스템학회:학술대회논문집
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    • pp.463-467
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    • 1992
  • This paper describes the automatic generation of sequence control programs for DCS(Distributed Control System), PLC(Programable Logic Controller) and so on. Since there is no same manufacturing process, it is difficult to standardize sequence programs. We propose the automatic sequence control program generator which is CAD software using knowledge engineering technique.

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An Efficient Method of Remote Control for Select Sequence in Process Control (공정제어에서 선택시퀀스를 위한 효율적인 리모트 콘트롤 제어방법)

  • Kong, Heon-Tag;Kim, Chi-Su;You, Jeong-Bong
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.11 no.1
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    • pp.107-112
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    • 2010
  • When we design the control system used Programmable Logic controller(PLC), if we program a Sequential Function Chart(SFC), It is easy to understand the sequential flow of control, to maintenance the controller and to describe a program. SFC language is programmed by a single sequence, a select sequence and a parallel sequence. In a select sequence, when the select step is error, the whole process is stopped. If the error step has no connection the whole process, the loss is down when we debugging the program without stopping the whole process. Therefore, this thesis shows the efficient method of remote control for select sequence and we confirmed its feasibility through actual example.

Improvement of Memory Efficiency for Alternative Sequence in Process Control System Described by SFC (SFC로 설계된 공정제어에서 선택시퀀스의 메모리효율향상)

  • You, Jeong-Bong
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.24 no.5
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    • pp.55-61
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    • 2010
  • When we design the control system used Programmable Logic Controller(PLC) by Sequential Function Chart(SFC), if we use a SFC, it is easy to know the sequential flow of control, to maintenance the controller and to describe a program. We program a SFC by a unique sequence, an alternative sequence and a parallel sequence. If we program a SFC by a alternative sequence, the memory size of a alternative sequence must be larger than the memory size of a unique sequence. Therefore this thesis show an efficient method to reduce a memory size and we confirmed its feasibility through actual example.

VPI-based Control Strategy for a Transformerless MMC-HVDC System Under Unbalanced Grid Conditions

  • Kim, Si-Hwan;Kim, June-Sung;Kim, Rae-Young;Cho, Jin-Tae;Kim, Seok-Woong
    • Journal of Electrical Engineering and Technology
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    • v.13 no.6
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    • pp.2319-2328
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    • 2018
  • This paper introduces a control method for a transformerless MMC-HVDC system. The proposed method can effectively control the grid currents of the MMC-HVDC system under unbalanced grid conditions such as a single line-to-ground fault. The proposed method controls the currents of the positive sequence component and the negative sequence component without separating algorithms. Therefore, complicated calculations for extracting the positive sequence and the negative sequence component are not required. In addition, a control method to regulate a zero sequence component current under unbalanced grid conditions in the transformerless MMC-HVDC system is also proposed. The validity of the proposed method is verified through PSCAD/EMTDC simulation.

Test sequence control chip design of logic test using FPGA (FPGA를 이용한 logic tester의 test sequence control chip 설계 및 검증)

  • Kang, Chang-Hun;Choi, In-Kyu;Choi, Chang;Han, Hye-Jin;Park, Jong-Sik
    • Proceedings of the KIEE Conference
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    • pp.376-379
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    • 2001
  • In this paper, I design the control chip that controls inner test sequence of Logic Tester to test chip. Logic tester has the thirteen inner instructions to control test sequence in test. And these instructions are saved in memory with test pattern data. Control chip generates address and control signal such as read, write signal of memory. Before testing, necessary data such as start address, end address, etc. are written to inner register of control chip. When test started, control chip receives the instruction in start address and executes, and generates address and control signals to access tester' inner memory. So whole test sequence is controlled by making the address and control signal in tester's inner memory. Control chip designs instruction's execution blocks, respectively. So if inner instruction is added from now on, a revision is easy. The control chip will be made using FPGA of Xilinx Co. in future.

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Control of Circulating Current in Modular Multilevel Converter under Unbalanced Voltage using Proportional-Resonant Controller

  • Quach, Ngoc-Thinh;Chae, Sang Heon;Kim, Eel-Hwan
    • Proceedings of the KIPE Conference
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    • pp.143-144
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    • 2016
  • The circulating current control within the phase legs is one of the main control objectives in a modular multilevel converter (MMC) under different operating conditions. This paper proposes a control strategy of circulating currents in the MMC under unbalanced voltage by using a proportional-resonant (PR) controller. Under the unbalanced voltage, the circulating currents in the MMC consists of three components such as positive-sequence, negative-sequence, and zero-sequence circulating currents. With the PR controller, all components of the circulating current will be directly controlled in the stationary reference frame without decomposing into positive- and negative-sequence components. Thus, the ripples in the circulating currents and the DC current are suppressed under the unbalanced voltage. The effectiveness of the proposed method is verified by simulation results based on PSCAD/EMTDC simulation program.

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Model Predictive Control of Circulating Current Suppression in Parallel-Connected Inverter-fed Motor Drive Systems

  • Kang, Shin-Won;Soh, Jae-Hwan;Kim, Rae-Young
    • Journal of Electrical Engineering and Technology
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    • v.13 no.3
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    • pp.1241-1250
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    • 2018
  • Parallel three-phase voltage source inverters in a direct connection configuration are widely used to increase system power ratings. A zero-sequence circulating current can be generated according to the switching method; however, the zero-sequence circulating current not only distorts current, but also reduces the system reliability and efficiency. In this paper, a model predictive control scheme is proposed for parallel inverters to drive an interior permanent magnet synchronous motor with zero-sequence circulating current suppression. The voltage vector of the parallel inverters is derived to predict and control the torque and stator flux components. In addition, the zero-sequence circulating current is suppressed by designing the cost function without an additional current sensor and high-impedance inductor. Simulation and experimental results are presented to verify the proposed control scheme.