• Title, Summary, Keyword: PRAM

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A Low Power Phase-Change Random Access Memory Using A Selective Data Write Scheme (선택적 데이터 쓰기 기법을 이용한 저전력 상변환 메모리)

  • Yang, Byung-Do
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.45-50
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    • 2007
  • This paper proposes a low power selective data write (SDW) scheme for a phase-change random access memory (PRAM). The PRAM consumes large write power because large write currents are required during long time. At first, the SDW scheme reads a stored data during write operation. And then, it writes an input data only when the input and stored data are different. Therefore, it can reduce the write power consumption to a half. The 1K-bit PRAM test chip with $128{\times}8bits$ is implemented with a $0.8{\mu}m$ CMOS technology with a $0.8{\mu}m$ GST cell.

Reset current of PRAM cell with top electrode contact size (상부전극 접촉면 크기에 따른 PRAM cell의 지우기 전류 특성)

  • Choi, Hong-Kyw;Jang, Nak-Won;Lee, Seong-Hwan;Yi, Dong-Young;Mah, Suk-Bum
    • Proceedings of the KIEE Conference
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    • pp.1272-1273
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    • 2008
  • PRAM(Phase change access memory) has desirable characteristics including high speed, low cost, low power, and simple process. PRAM is based on the reversible phase transition between resistive amorphous and conductive crystalline states of chalcogenide. However, PRAM needs high reset current for operation. PRAM have to reduce reset current for high density and competitiveness. Therefore, we have investigated the reset current of PRAM with top electrode contact hole size using 3-D finite element analysis tool in this paper.

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P-RAM 기술의 전망

  • Jeong Hong-Sik
    • Proceedings of the Korean Society Of Semiconductor Equipment Technology
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    • pp.21-40
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    • 2006
  • [ ${\Box}$ ] Opportunities for PRAM Nearly ideal memory characteristics Potential for high density & low cost memory ${\Box}$ Technical Challenges Writing current reduction is the most urgent issue. ${\to}$ chalcogenide, programming volume, current density, heat loss control Improvement of writing speed, reliability ${\Box}$ Prospects (PRAM as a Mainstream Memory) Evenn, We have demonstrated 256Mb PRAM Realization of high density and low cost PRAM with good reliability will be key succss factor. We need to develop PRAM specific applications.

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A Study on the Influences of the Wideness of Pram in Designing Aftbody of Container Vessels (Container선(船) 선미부형상(船尾部形狀) 설계(設計)에 있어서 Pram Wideness의 영향(影響)에 대한 고찰(考察))

  • J.S.,Moon;S.M.,HwangBo
    • Bulletin of the Society of Naval Architects of Korea
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    • v.26 no.1
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    • pp.63-72
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    • 1989
  • The influences of the wideness of pram in designing aftbody of container vessels are investigated. The large transverse KM value of the wide pram aftbody is likely to be regarded as having exellent cargo loading capacity. However the remarkable stability loss under the certain wave conditions, unfavorable situation for structural arrangement and the possibilities of poor vibration and speed-power performances should be considered in case of adopting the wide pram aftbody.

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Reducing Method of Energy Consumption of Phase Change Memory using Narrow-Value Data (내로우 값을 이용한 상변화 메모리상에서의 에너지 소모 절감 기법)

  • Kim, Young-Ung
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.15 no.2
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    • pp.137-143
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    • 2015
  • During the past 30 years, DRAM has been used for the reasons of economic efficiency of the production. Recently, PRAM has been emerged to overcome the shortcomings of DRAM. In this paper, we propose a technique that can reduce energy consumption by use of a narrow values to the write operation of PRAM. For this purpose, we describe the data compression method using a narrow value and the architecture of PRAM, We also experiment under the Simplescalar 3.0e simulator and SPEC CPU2000 benchmark environments. According to the experiments, the data hit rate of PRAM was increased by 39.4% to 67.7% and energy consumption was reduced by 9.2%. In order to use the proposed technique, it requires 3.12% of space overhead per word, and some additional hardware modules.

Data Deduplication Method using PRAM Cache in SSD Storage System (SSD 스토리지 시스템에서 PRAM 캐시를 이용한 데이터 중복제거 기법)

  • Kim, Ju-Kyeong;Lee, Seung-Kyu;Kim, Deok-Hwan
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.4
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    • pp.117-123
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    • 2013
  • In the recent cloud storage environment, the amount of SSD (Solid-State Drive) replacing with the traditional hard disk drive is increasing. Management of SSD for its space efficiency has become important since SSD provides fast IO performance due to no mechanical movement whereas it has wearable characteristics and does not provide in place update. In order to manage space efficiency of SSD, data de-duplication technique is frequently used. However, this technique occurs much overhead because it consists of data chunking, hasing and hash matching operations. In this paper, we propose new data de-duplication method using PRAM cache. The proposed method uses hierarchical hash tables and LRU(Least Recently Used) for data replacement in PRAM. First hash table in DRAM is used to store hash values of data cached in the PRAM and second hash table in PRAM is used to store hash values of data in SSD storage. The method also enhance data reliability against power failure by maintaining backup of first hash table into PRAM. Experimental results show that average writing frequency and operation time of the proposed method are 44.2% and 38.8% less than those of existing data de-depulication method, respectively, when three workloads are used.

Atomic layer deposition of In-Sb-Te Thin Films for PRAM Application

  • Lee, Eui-Bok;Ju, Byeong-Kwon;Kim, Yong-Tae
    • Proceedings of the Korean Vacuum Society Conference
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    • pp.132-132
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    • 2011
  • For the programming volume of PRAM, Ge2Sb2Te5(GST) thin films have been dominantly used and prepared by physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD). Among these methods, ALD is particularly considered as the most promising technique for the integration of PRAM because the ALD offers a superior conformality to PVD and CVD methods and a digital thickness control precisely to the atomic level since the film is deposited one atomic layer at a time. Meanwhile, although the IST has been already known as an optical data storage material, recently, it is known that the IST benefits multistate switching behavior, meaning that the IST-PRAM can be used for mutli-level coding, which is quite different and unique performance compared with the GST-PRAM. Therefore, it is necessary to investigate a possibility of the IST materials for the application of PRAM. So far there are many attempts to deposit the IST with MOCVD and PVD. However, it has not been reported that the IST can be deposited with the ALD method since the ALD reaction mechanism of metal organic precursors and the deposition parameters related with the ALD window are rarely known. Therefore, the main aim of this work is to demonstrate the ALD process for IST films with various precursors and the conformal filling of a nano size programming volume structure with the ALD?IST film for the integration. InSbTe (IST) thin films were deposited by ALD method with different precursors and deposition parameters and demonstrated conformal filling of the nano size programmable volume of cell structure for the integration of phase change random access memory (PRAM). The deposition rate and incubation time are 1.98 A/cycle and 25 cycle, respectively. The complete filling of nano size volume will be useful to fabricate the bottom contact type PRAM.

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A Low Power PRAM using a Power-Dependant Data Inversion Scheme (전력-종속 데이터 반전 기법을 이용한 저전력 상변환 메모리)

  • Yang, Byung-Do
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.11
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    • pp.95-100
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    • 2007
  • A low power PRAM using a power-dependant data inversion (PDI) scheme is proposed. The PRAM consumes large write power because large write currents are required during long time. Also, the power consumptions for storing #1# and #0# are different. The PDI circuit compares the power consumptions to store the original data and its inverted data, and then it stores the less power consuming data. Although the PDI scheme needs an additional inversion bit per data, the maximum and average powers of the PDI can be under 50% and 37.5% of the conventional write scheme, respectively. The average power for storing 8bit data is under 41%, due to the inversion bit. The 1K-bit PRAM chip with 128$\times$8bits was implemented with a 0.8${\mu}m$ CMOS technology with a 0.5${\mu}m$ GST cell.

simulation for an phase change random access memory device (상변환 메모리 단위소자 시뮬레이레이션)

  • 구창효;김성순;이근호;이홍림
    • Proceedings of the Materials Research Society of Korea Conference
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    • pp.179-179
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    • 2003
  • 현재 차세대 메모리로 연구되고 있는 것 중 가장 각광 받는 것은 PRAM 이다. MRAM의 경우 복잡한 공정 때문에 상용화에 많은 어려움이 따르는데 반해 PRAM은 DRAM과 유사한 구조를 가지고 있기 때문에 기존 DRAM의 공정라인을 사용할 수 있다는 장점을 가지고 있다. 하지만 PRAM은 높은 작동전류가 필요하다는 단점을 가지고 있다. 따라서 PRAM이 상용화 되기 위해서는 2mA 이하의 작동전류에서 상변환이 일어나야 한다. 여기서 말하는 상변환이란 결정질 상태를 비정질 상태로 변환 시키는 것을 의미한다. 본 연구에서는 우선 8F$^2$ 크기(F=0.15$\mu\textrm{m}$)의 DRAM 단위소자 메모리 구조를 이용하여 lT/lRPCRAM 모델을 구축하였다. 구축된 모델을 이용하여 요구되는 작동전류(2mA이하)에서의 PRAM의 온도 분포를 시뮬레이션을 통하여 예측하였다. 또한 단위소자를 구성하는 재료의 물성 변화가 소자 내부의 온도 분포에 미치는 영향을 분석하였다.

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Electro-Thermal Characteristics of Hole-type Phase Change Memory (Hole 구조 상변화 메모리의 전기 및 열 특성)

  • Choi, Hong-Kyw;Jang, Nak-Won;Kim, Hong-Seung;Lee, Seong-Hwan;Yi, Dong-Young
    • Journal of Advanced Marine Engineering and Technology
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    • v.33 no.1
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    • pp.131-137
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    • 2009
  • In this paper, we have manufactured hole type PRAM unit cell using phase change material $Ge_2Sb_2Te_5$. The phase change material $Ge_2Sb_2Te_5$ was deposited on hole of 500 nm size using sputtering method. Reset current of PRAM unit cell was confirmed by measuring R-V characteristic curve. Reset current of manufactured hole type PRAM unit cell is 15 mA, 100 ns. And electro and thermal characteristics of hole type PRAM unit cell were analyzed by 3-D finite element analysis. From simulation temperature of PRAM unit cell was $705^{\circ}C$.