• Title/Summary/Keyword: Nano scale

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Fabrication of Nano-Size Specimens for Tensile Test Employing Nano-Indentation Device (나노 인장시험을 위한 압축 시험기용 인장시편 제작에 관한 연구)

  • Lim, Tae Woo;Yang, Dong-Yol
    • Journal of the Korean Society for Precision Engineering
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    • v.32 no.10
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    • pp.911-916
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    • 2015
  • In the nano/micro scale, material properties are dependent on the size-scale of a structure. However, conventional micro-scale tensile tests have limitations to obtain reliable values of nano-scale material properties owing to residual stress and elastic slippage in the gripping/aligning process. The indenter-driven nano-scale tensile test provides prominent advantages simple testing device, high-quality nano-scale metallic specimen with negligible residual stress. In this paper, two-types of specimens (a specimen with multi-testing parts and a specimen with a single-testing part) are discussed. Focused ion beam (FIB) is employed to fabricate a nano-scale specimen from a thin nickel film. Using the specimen with a single-testing part, we obtained a nano-scale stress-strain curve of electroplated nickel film.

Innovative Remediation of Arsenic in Groundwater by Nano Scale Zero-Valent Iron

  • Kanel, Sushil-Raj;Kim, Ju-Yong;Park, Heechul
    • Proceedings of the Korean Society of Soil and Groundwater Environment Conference
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    • 2003.09a
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    • pp.87-90
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    • 2003
  • This research examines the feasibility of using laboratory-synthesized nano scale zero-valent iron particles to remove arsenic from aqueous phase. Batch experiments were performed to determine arsenic sorption rates as a function of the nano scale zero-valent iron solution concentration. Rapid adsorption of arsenic was achieved with the nano scale zero-valent iron. Typically 1 mg $L^{-1}$ arsenic (III) was adsorbed by 5 g $L^{-1}$ nano scale zero-valent iron below the 0.01 g $L^{-1}$ concentration within 7min. The kinetics of the arsenic sorption followed pseudo-first-order reaction kinetics. Observed reaction rate constants ( $K_{obs}$) varied between 11.4 to 129.0 $h^{-1}$ with respect to different concentrations of nano scale zero-valent iron. A variety of analytical techniques were used to study the reaction products including HGAAS (hydride generator atomic adsorption spectrophotometer), SEM (scanning electron microscopy) and TEM (transmission electron microscopy). Our experimental results suggest novel method for efficient removal of arsenic Iron groundwater.r.

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PMOSFET Hot Carrier Lifetime Dominated by Hot Hole Injection and Enhanced PMOSFET Degradation than NMOSFET in Nano-Scale CMOSFET Technology (PMOSFET에서 Hot Carrier Lifetime은 Hole injection에 의해 지배적이며, Nano-Scale CMOSFET에서의 NMOSFET에 비해 강화된 PMOSFET 열화 관찰)

  • 나준희;최서윤;김용구;이희덕
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.7
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    • pp.21-29
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    • 2004
  • Hot carrier degradation characteristics of Nano-scale CMOSFETs with dual gate oxide have been analyzed in depth. It is shown that, PMOSFET lifetime dominate the device lifetime than NMOSFET In Nano-scale CMOSFETs, that is, PMOSFET lifetime under CHC (Channel Hot Carrier) stress is much lower than NMOSFET lifetime under DAHC (Dram Avalanche Hot Carrier) stress. (In case of thin MOSFET, CHC stress showed severe degradation than DAHC for PMOSFET and DAHC than CHC for NMOSFET as well known.) Therefore, the interface trap generation due to enhanced hot hole injection will become a dominant degradation factor in upcoming Nano-scale CMOSFET technology. In case of PMOSFETs, CHC shows enhanced degradation than DAHC regardless of thin and thick PMOSFETs. However, what is important is that hot hole injection rather than hot electron injection play a important role in PMOSFET degradation i.e. threshold voltage increases and saturation drain current decreases due to the hot carrier stresses for both thin and thick PMOSFET. In case of thick MOSFET, the degradation by hot carrier is confirmed using charge pumping current method. Therefore, suppression of PMOSFET hot carrier degradation or hot hole injection is highly necessary to enhance overall device lifetime or circuit lifetime in Nano-scale CMOSFET technology

Possibility & Limitation of 1D Nano Scale Electron Shielder (나노 구조물을 이용한 전자선 차폐 가능성과 한계 조사)

  • Ahn, Sung-Jun;Lee, Bum-Su;Kim, Chong-Yeal
    • Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
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    • v.5 no.2
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    • pp.109-112
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    • 2007
  • The possibility and limitation of one dimensional nano scale electron shielder is briefly discussed. A Nano scale electron shielder will reduce the weight and size of shielding materials. However, practical application still requires further research. In this work, we discuss general problems related to nano scale electron shielder, by taking an arbitrary one dimensional potential barrier as an example.

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Alignment Algorithm for Nano-scale Three-dimensional Printing System (나노스케일 3 차원 프린팅 시스템을 위한 정렬 알고리즘)

  • Jang, Ki-Hwan;Lee, Hyun-Taek;Kim, Chung-Soo;Chu, Won-Shik;Ahn, Sung-Hoon
    • Journal of the Korean Society for Precision Engineering
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    • v.31 no.12
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    • pp.1101-1106
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    • 2014
  • Hybrid manufacturing technology has been advanced to overcome limitations due to traditional fabrication methods. To fabricate a micro/nano-scale structure, various manufacturing technologies such as lithography and etching were attempted. Since these manufacturing processes are limited by their materials, temperature and features, it is necessary to develop a new three-dimensional (3D) printing method. A novel nano-scale 3D printing system was developed consisting of the Nano-Particle Deposition System (NPDS) and the Focused Ion Beam (FIB) to overcome these limitations. By repeating deposition and machining processes, it was possible to fabricate micro/nano-scale 3D structures with various metals and ceramics. Since each process works in different chambers, a transfer process is required. In this research, nanoscale 3D printing system was briefly explained and an alignment algorithm for nano-scale 3D printing system was developed. Implementing the algorithm leads to an accepted error margin of 0.5% by compensating error in rotational, horizontal, and vertical axes.

New RF Empirical Nonlinear Modeling for Nano-Scale Bulk MOSFET (나노 스케일 벌크 MOSFET을 위한 새로운 RF 엠피리컬 비선형 모델링)

  • Lee, Seong-Hearn
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.12 s.354
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    • pp.33-39
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    • 2006
  • An empirical nonlinear model with intrinsic nonlinear elements has been newly developed to predict the RF nonlinear characteristics of nano-scale bulk MOSFET accurately over the wide bias range. Using an extraction method suitable for nano-scale MOSFET, the bias-dependent data of intrinsic model parameters have been accurately obtained from measured S-parameters. The intrinsic nonlinear capacitance and drain current equations have been empirically obtained through 3-dimensional curve-fitting to their bias-dependent curves. The modeled S-parameters of 60nm MOSFET have good agreements with measured ones up to 20GHz in the wide bias range, verifying the accuracy of the nano-scale MOSFET model.

Nano-Scale Cu Direct Bonding Technology Using Ultra-High Density, Fine Size Cu Nano-Pillar (CNP) for Exascale 2.5D/3D Integrated System

  • Lee, Kang-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.23 no.4
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    • pp.69-77
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    • 2016
  • We propose nano-scale Cu direct bonding technology using ultra-high density Cu nano-pillar (CNP) with for high stacking yield exascale 2.5D/3D integration. We clarified the joining mechanism of nano-scale Cu direct bonding using CNP. Nano-scale Cu pillar easily bond with Cu electrode by re-crystallization of CNP due to the solid phase diffusion and by morphology change of CNP to minimize interfacial energy at relatively lower temperature and pressure compared to conventional micro-scale Cu direct bonding. We confirmed for the first time that 4.3 million electrodes per die are successfully connected in series with the joining yield of 100%. The joining resistance of CNP bundle with $80{\mu}m$ height is around 30 m for each pair of $10{\mu}m$ dia. electrode. Capacitance value of CNP bundle with $3{\mu}m$ length and $80{\mu}m$ height is around 0.6fF. Eye-diagram pattern shows no degradation even at 10Gbps data rate after the lamination of anisotropic conductive film.

Possibility & Limitation of 1D Nano Scale Electron Shielder (나노 구조물을 이용한 전자선 차폐 가능성과 한계)

  • Ahn, Sung-Jun;Lee, Bum-Su;Kim, Chong-Yeal;Yang, O-Bong;Shin, Hyung-Sik
    • Proceedings of the Korean Radioactive Waste Society Conference
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    • 2005.11a
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    • pp.301-306
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    • 2005
  • The possibility and limitation of one dimensional nano scale electron shielder is briefly discussed. A Nano scale electron shielder will reduce the weight and size of shielding materials. However, practical application still requires further research. In this work, we discuss general problems related to nano scale electron shielder, by taking an arbitrary one dimensional potential barrier as an example.

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Novel Environmentally Benign and Low-Cost Pd-free Electroless Plating Method Using Ag Nanosol as an Activator

  • Kim, Jun Hong;Oh, Joo Young;Song, Shin Ae;Kim, Kiyoung;Lim, Sung Nam
    • Journal of Electrochemical Science and Technology
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    • v.8 no.3
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    • pp.215-221
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    • 2017
  • The electroless plating process largely consists of substrate cleaning, seed formation (activator formation), and electroless plating. The most widely used activator in the seed formation step is Pd, and Sn ions are used to facilitate the formation of this Pd seed layer. This is problematic because the Sn ions interfere with the reduction of Cu ions during electroless plating; thus, the Sn ions must be removed by a hydrochloric acid cleaning process. This method is also expensive due to the use of Pd. In this study, Cu electroless plating was performed by forming a seed layer using a silver nanosol instead of Pd and Sn. The effects of the Ag nanosol concentration in the pretreatment solution and the pretreatment time on the thickness and surface morphology of the Cu layer were investigated. The degrees of adhesion to the substrate were similar for the electroless-plated Cu layers formed by conventional Pd activation and those formed by the Ag nanosol.