• Title, Summary, Keyword: Interface layer

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Changes in Interface Properties of TCO/a-Si:H Layer by Zn Buffer Layer in Silicon Heterojunction Solar Cells (실리콘 이종접합 태양전지의 Zn 확산방지층에 의한 TCO/a-Si:H 층간의 계면특성 변화)

  • Tark, Sung-Ju;Son, Chang-Sik;Kim, Dong-Hwan
    • Korean Journal of Materials Research
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    • v.21 no.6
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    • pp.341-346
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    • 2011
  • In this study, we inserted a Zn buffer layer into a AZO/p-type a-si:H layer interface in order to lower the contact resistance of the interface. For the Zn layer, the deposition was conducted at 5 nm, 7 nm and 10 nm using the rf-magnetron sputtering method. The results were compared to that of the AZO film to discuss the possibility of the Zn layer being used as a transparent conductive oxide thin film for application in the silicon heterojunction solar cell. We used the rf-magnetron sputtering method to fabricate Al 2 wt.% of Al-doped ZnO (AZO) film as a transparent conductive oxide (TCO). We analyzed the electro-optical properties of the ZnO as well as the interface properties of the AZO/p-type a-Si:H layer. After inserting a buffer layer into the AZO/p-type a-Si:H layers to enhance the interface properties, we measured the contact resistance of the layers using a CTLM (circular transmission line model) pattern, the depth profile of the layers using AES (auger electron spectroscopy), and the changes in the properties of the AZO thin film through heat treatment. We investigated the effects of the interface properties of the AZO/p-type a-Si:H layer on the characteristics of silicon heterojunction solar cells and the way to improve the interface properties. When depositing AZO thin film on a-Si layer, oxygen atoms are diffused from the AZO thin film towards the a-Si layer. Thus, the characteristics of the solar cells deteriorate due to the created oxide film. While a diffusion of Zn occurs toward the a-Si in the case of AZO used as TCO, the diffusion of In occurs toward a-Si in the case of ITO used as TCO.

Resistive switching behaviors of Ti nano-layer embedded TaOx-based devices

  • Jeon, Heeyoung;Park, Jingyu;Jang, Woochool;Kim, Hyunjung;Lee, Kunyoung;Shin, Changhee;Lee, Jaemin;Jeon, Hyeongtag
    • Current Applied Physics
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    • v.17 no.2
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    • pp.230-234
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    • 2017
  • The role of a Ti nano-layer embedded in $TaO_x$-based devices operating with conductive filaments consisting of oxygen vacancies was investigated. The Ti nano-layer was embedded in three different positions: the top interface ($Au/TaO_x$), bottom interface ($TaO_x/TiN$), and both interfaces. The embedded Ti nano-layer serves as not only an oxygen reservoir but also a tunneling barrier in the case of the top interface. The position of the Ti nano-layer and its thickness play important roles in the resistive switching behaviors. In addition, the effect of the current compliance on the resistive switching behaviors was evaluated. The different resistive switching behaviors were investigated using current-voltage sweep measurements and X-ray photoelectron spectroscopy. The non-linear behavior of the low resistance state could be controlled by the top interface and current compliance. The current of the high resistance state could be controlled by the bottom interface. It is noteworthy that only 1.5-nm-thick Ti nano-layer can adjust the non-linear behavior of the low resistance state at top interface and the current of the high resistance state at bottom interface.

Stress Analysis in Polymeric Coating Layer Deposited on Rigid Substrate

  • Lee, Sang Soon
    • Corrosion Science and Technology
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    • v.14 no.4
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    • pp.161-165
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    • 2015
  • This paper presents an analysis of thermal stress induced along the interface between a polymeric coating layer and a steel substrate as a result of uniform temperature change. The epoxy layer is assumed to be a linear viscoelastic material and to be theromorheologically simple. The viscoelastic boundary element method is employed to investigate the behavior of interface stresses. The numerical results exhibit relaxation of interface stresses and large stress gradients, which are observed in the vicinity of the free surface. Since the exceedingly large stresses cannot be borne by the polymeric coating layer, local cracking or delamination can occur at the interface corner.

Double Layer (Wet/CVD $SiO_2$)의 Interface Trap Density에 대한 연구

  • Lee, Gyeong-Su;Choe, Seong-Ho;Choe, Byeong-Deok
    • Proceedings of the Korean Vacuum Society Conference
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    • pp.340-340
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    • 2012
  • 최근 MOS 소자들이 게이트 산화막을 Mono-layer가 아닌 Multi-Layer을 사용하는 추세이다. Bulk와 High-k물질간의 Dangling Bond를 줄이기 위해 Passivation 층을 만드는 것을 예로 들 수 있다. 이러한 Double Layer의 쓰임이 많아지면서 계면에서의 Interface State Density의 영향도 커지게 되면서 이를 측정하는 방법에 대한 연구가 활발히 진행되고 있다. 본 연구에서는 $SiO_2$ Double Layer의 Interface State Density를 Conductance Method를 사용하여 구하는 연구를 진행하였다. Wet Oxidation과 Chemical Vapor Deposition (CVD) 공정을 이용하여 $SiO_2$ Double-layer로 증착한 후 Aluminium을 전극으로 하는 MOS-Cap 구조를 만들었다. 마지막 공정은 $450^{\circ}C$에서 30분 동안 Forming-Gas Annealing (FGA) 공정을 진행하였다. LCR meter를 이용하여 high frequency C-V를 측정한 후 North Carolina State University California Virtual Campus (NCSU CVC) 프로그램을 이용하여 Flatband Voltage를 구한 후에 Conductance Method를 측정하여 Dit를 측정하였다. 본 연구 결과 Double layer (Wet/CVD $SiO_2$)에 대해서 Conductance Method를 방법을 이용하여 Dit를 측정하는 것이 유효하다는 것을 확인 할 수 있었다. 본 실험은 앞으로 많이 쓰이고 측정될 Double layer (Wet/CVD $SiO_2$)에 대한 Interface State Density의 측정과 분석에 대한 방향을 제시하는데 도움이 될 것이라 판단된다.

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The oxidation of silicon nitride layer (실리콘 질화막의 산화)

  • 정양희;이영선;박영걸
    • Electrical & Electronic Materials
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    • v.7 no.3
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    • pp.231-235
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    • 1994
  • The multi-dielectric layer $SiO_2$/$Si_3{N_4}$/$SiO_2$ (ONO) is used to improve charge retention and to scale down the memory device. The nitride layer of MNOS device is oxidize to form ONO system. During the oxidation of the nitride layer, the change of thickness of nitride layer and generation of interface state between nitride layer and top oxide layer occur. In this paper, effects of oxidation of the nitride layer is studied. The decreases of the nitride layer due to oxidation and trapping characteristics of interface state of multi layer dielectric film are investigated through the C-V measurement and F-N tunneling injection experiment using SONOS capacitor structure. Based on the experimental results, carrier trapping model for maximum flatband voltage shift of multi layer dielectric film is proposed and compared with experimental data. As a results of curve fitting, interface trap density between the top oxide and layer is determined as being $5{\times}10^11$~$2{\times}10^12$[$eV^1$$cm^2$].

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Estimation of Tensile Strain Effect Factor of Layer Interface Considering Lateral Loads of Moving Vehicle (주행차량의 수평하중을 고려한 층 경계면의 인장변형률 영향계수 개발)

  • Seo, Joo Won;Choi, Jun Seong;Kim, Soo Il
    • Journal of The Korean Society of Civil Engineers
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    • v.26 no.6D
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    • pp.951-960
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    • 2006
  • Structural pavement analysis considering lateral loads of moving vehicle was carried out in order to simulate passing vehicle loads under various interface conditions. To verify of existing multi-layer elastic analysis of layer interface effect parameters, this study compared outputs by using ABAQUS, a three dimensional finite element program and KENLAYER, multi-layer elastic analysis as vertical load was applied to the surface of asphalt pavements. Pavement performance depending on interface conditions was quantitatively evaluated and fundamental study of layer interface effect parameters was performed in this study. As results of the study, if only vertical loads of moving vehicle is applied, subdivision of either fully bonded or fully unbonded is enough to indicate interface effect parameters. On the other hand, when lateral loads are applied with vertical loads, pavement behavior and performance are greatly changed with respect to layer interface conditions. The thinner thickness of the asphalt layer is and the smaller elastic moduli of the asphalt layer is, the more pavement behavior is influenced by interface conditions. In addition, regression analysis equation analytically computing tensile strain which was considered thicknesses and elastic moduli of the asphalt layer and layer interface effect parameters at the bottom of the asphalt layer was presented using database from numerical analyses on national pavement model sections.

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Lower layer implementation of a fieldbus network interface (Fieldbus 네트워크 접속기의 하위계층 구현)

  • 김현기;이전우;황선호;이혁희;채영도
    • 제어로봇시스템학회:학술대회논문집
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    • pp.337-341
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    • 1991
  • Fieldbus is a low level serial digital network which will be used for factory automation. This paper describes lower layer implementation of a Fieldbus network interface. Physical layer provides hardware interface between IBM-PC and Fieldbus. Also, physical layer uses manchester coding, shielded twisted pair lines and RS-485 electrical standard. Data link layer includes Intel's iDCX96 real time executive for 8797 one chip microcontroller and Fieldbus data link protocol software.

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Effects of Microstructural Change in Joint Interface on Mechanical Properties of Si3N4/S.S316 joint with Ni Buffer layer (Ni buffer layer를 사용한 Si3N4/S.S316 접합체에서 접합계면의 미세구조 변화가 접합체의 기계적 특성에 미치는 영향)

  • 장희석;박상환;권혁보;최성철
    • Journal of the Korean Ceramic Society
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    • v.37 no.4
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    • pp.381-387
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    • 2000
  • Si3N4/stainless steel 316 joints with Ni buffer layer were fabricated by direct active brazing method (DIB) using Ag-Cu-Ti brazing alloy only and double brazing method (DOB) using Ag-Cu brazing alloy with Si3N4 pretreated with Ag-Cu-Ti brazing alloy. For the joint brazed by DIB method, Ti was segregated at the Si3N4/brazing alloy interface, but was not enough to form a stable joint interface. In addition, large amounts of Ni-Ti inter-metallic compounds were formed in tehbrazing alloy near the joint interface, which could deplete the contents of Ti involved in the interfacial reaction. However, for the joint brazed by DOB method, segregation of Ti at the joint interface were enough to enhance the formation of stable interfacial reaction products such as TiN and Ti-Si-Ni-N-(Cu) multicompounds, which restricted the formation of Ni-Tio inter-metallic compounds in the brazing alloy during brazing with Ni buffer layer. Fracture strength of Si3N4/S.S 316 joints with Ni buffer layer was much improved by using DOB method rather than DIB method. It could be deduced that the differences of fracture strength of the joint with Ni buffer layer depending on brazing process adapted were directly affected by the formation of stable joint interface and the change in microstructure of the brazing alloy near the joint interface. It was found that fracture strength of Si3N4/S.S 316 joints with Ni buffer layer was gradually reduced as the thickness of interface. It was found that fracture strength of Si3N4/S.S 316 joints with Ni buffer layer was gradually reduced as the thickness of Ni buffer layer in the joint was increased from 0.1 mm to 10 mm. It seems to due to the increased residual stress in the joint as the thickness of Ni buffer layer is increased. The maximum fracture strength of Si3N4/S.S 316 joints with Ni buffer layer was 386 MPa, and the fracture of joint was originated at Si3N4/brazing alloy joint interface and propagated into Si3N4 matrix.

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Frictionless contact problem for a layer on an elastic half plane loaded by means of two dissimilar rigid punches

  • Ozsahin, Talat Sukru
    • Structural Engineering and Mechanics
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    • v.25 no.4
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    • pp.383-403
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    • 2007
  • The contact problem for an elastic layer resting on an elastic half plane is considered according to the theory of elasticity with integral transformation technique. External loads P and Q are transmitted to the layer by means of two dissimilar rigid flat punches. Widths of punches are different and the thickness of the layer is h. All surfaces are frictionless and it is assumed that the layer is subjected to uniform vertical body force due to effect of gravity. The contact along the interface between elastic layer and half plane will be continuous, if the value of load factor, ${\lambda}$, is less than a critical value, ${\lambda}_{cr}$. However, if tensile tractions are not allowed on the interface, for ${\lambda}$ > ${\lambda}_{cr}$ the layer separates from the interface along a certain finite region. First the continuous contact problem is reduced to singular integral equations and solved numerically using appropriate Gauss-Chebyshev integration formulas. Initial separation loads, ${\lambda}_{cr}$, initial separation points, $x_{cr}$, are determined. Also the required distance between the punches to avoid any separation between the punches and the layer is studied and the limit distance between punches that ends interaction of punches, is investigated. Then discontinuous contact problem is formulated in terms of singular integral equations. The numerical results for initial and end points of the separation region, displacements of the region and the contact stress distribution along the interface between elastic layer and half plane is determined for various dimensionless quantities.

Atomic Layer Etching of interface Passivation Layer for III-V compound semiconductor devices (III-V족 반도체 소자의 Interface Passivation Layer을 위한 원자층 식각)

  • Yun, Deok-Hyeon;Kim, Hwa-Seong;Park, Jin-U;Yeom, Geun-Yeong
    • Proceedings of the Korean Institute of Surface Engineering Conference
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    • pp.196-196
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    • 2014
  • 플라즈마 건식 식각 기술은 반도체 식각공정에서 효과적으로 이용되고 있으며, 반도체 소자의 크기가 줄어듬에 따라 미세하고 정확하게 식각 깊이를 제어할 수 있는 원자층 식각 기술이 개발되었다. 3-5족 반도체 소자의 Interface Passivation Layer 로 이용되는 $Al_2O_3$ 와 BeO 의 원자층 식각을 하였으며, 각각의 원자층 식각 조건과 식각 후의 표면 거칠기 변화에 대한 영향을 확인 할 수 있었다.

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