• Title, Summary, Keyword: FPGA

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Design and Qualification of FPGA-based Controller applying HPD Development Life-Cycle for Nuclear Instrumentation and Control System (HPD 개발수명주기를 적용한 원전 FPGA 기반 제어기의 설계와 검증)

  • Lee, Joon-Ku;Jeong, Kwang-Il;Park, Geun-Ok;Sohn, Kwang-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.9 no.6
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    • pp.681-687
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    • 2014
  • Nuclear industries have faced unfavorable circumstances such as an obsolescence of the instrumentation and control system, and therefore nuclear society is striving to resolve this issue fundamentally. IEC and IAEA judge that FPGA technology is a good replacement for Programmable Logic Controller (PLC) of Nuclear Instrumentation and Control System. FPGAs are currently highlighted as an alternative means for obsolete control systems. Because the main function inside an FPGA is initially developed as software, good software quality can impact the reliability of an FPGA-based controller. Therefore, it is necessary to establish a software development aspect strategy that enhances the reliability of an FPGA-based controller. In terms of software development, HDL-Programmed Device (HPD) Development Life Cycle is applied into FPGA-based Controller. The burn-in test and environmental(temperature) test should be performed in order to apply into nuclear instrumentation and control system. Therefore it is ensured that the developed FPGA-based controller are normally operated for 352 hours and 92 hours in test chamber of Korea Institute of Machinery and Materials (KIMM).

Hardware Implementation of Motor Controller Based on Zynq EPP(Extensible Processing Platform) (Zynq EPP를 이용한 모터 제어기의 하드웨어 구현)

  • Moon, Yong-Seon;Lim, Seung-Woo;Lee, Young-Pil;Bae, Young-Chul
    • The Journal of the Korea institute of electronic communication sciences
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    • v.8 no.11
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    • pp.1707-1712
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    • 2013
  • In this paper, we implement a hardware for motor control based on FPGA + embedded processor using Zynq EPP which is All Programmable SoC in order to improve a structural problem of motion control based on such as DSP, MCU and FPGA previously. The implemented motor controller that is fused controller with advantage of FPGA and embedded processor. The signal processing part of high velocity motor control is performed by motor controller based on FPGA. A motion profile and kinematic calculation that are required algorithm process such as operation of a complicate decimal point has processed in an embedded processor based on dual core. As a result of a hardware implementation, it has an advantage that has can be realized an effect of distribution process in one chip. It has also an advantage that is able to organize as a multi-axis motor controller through adding the IP core of motor control implemented on FPGA.

Implementation of an Intelligent Controller with a DSP and an FPGA for Nonlinear Systems

  • Kim, Sung-Su;Jung, Seul
    • 제어로봇시스템학회:학술대회논문집
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    • pp.575-580
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    • 2003
  • In this paper, we develop a control hardware such as an FPGA based general purpose controller with a DSP board to solve nonlinear control problems. PID control algorithms are implemented in an FPGA and neural network control algorithms are implemented in a DSP board. PID controllers implemented on an FPGA was designed by using VHDL to achieve high performance and flexibility. By using high capacity of an FPGA, the additional hardware such as an encoder counter and a PWM generator, can be implemented in a single FPGA device. As a result, the noise and power dissipation problems can be minimized and the cost effectiveness can be achieved. In order to show the performance of the developed controller, it was tested for controlling nonlinear systems such as an inverted pendulum.

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통합된 FPGA 개발 방법 및 환경

  • 조한진;엄낙웅
    • The Magazine of the IEIE
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    • v.23 no.11
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    • pp.23-33
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    • 1996
  • 본 논문은 원판과 전용 CAD 틀로 구성되는 FPGA시스템을 개발하는데 있어서 서로 다른 요소 기술들의 관계와 이들 요소 기술들과 시스템성능의 관계를 모델하여 시스템 사양을 만족하기 위하여 가장 효율적인 방법을 찾게하는 방법에 관한 것이다. 본 논문에서는 실제로 개발된 시스템을 예로 하여 FPGA시스템 개발에서 고려해야 할 점들을 고찰하였다. 새로운 FPGA 시스템의 개발 순서는 먼저 개발할 FPGA의 응용 분야를 결정하고, 그 응용 분야에 필요한 시스템 사양에 맞게 개발한 요소 기술들과 그 기술들의 범위를 정한다. 개발 흐름도를 이용하여 이 요소 기술들의 연관 관계를 수직적으로는 시스템 성능에 미치는 영향을 모델링하고 수평적으로는 요소 기술간의 서로 미치는 영향을 모델링 하여 시스템 사양을 만족하기 위한 최적의 해를 구한다. 이때 최종적인 FPGA 시스템을 평가하고 검증할 수 있는 방법을 결정한다. 요소 기술들이 개발 됨에 따라 좀 더 구체적이고 정확한 모델에 의해 전체 시스템의 성능은 평가되고 검증될 수 있다. 이러한 방법과 환경은 FPGA 시스템을 빠르고 효율적으로 개발할 수 있게 한다.

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Hardware Design of 240*320 TFT-LCD Controller (240*320 TFT-LCD의 컨트롤러 하드웨어 설계)

  • Sung, Kwang-Ju;Ha, Chang-Soo;Choi, Byeong-Yoon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • pp.167-169
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    • 2010
  • This paper describes hardware design and FPGA verification of TFT-LCD controller used in mobile devices widely. TFT-LCD controller outputs pixel's color information red, green, blue and Hsync, Vsync synchronization signals. We used verilog-hdl to describe TFT-LCD controller and simulated it using modelsim software and verified it's exact operation on Xilinx FPGA. Framebuffer made up Block RAM form in FPGA and TFT-LCD displayed image file.

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Implementation of Signal Measurement System using FPGA (FPGA를 이용한 신호측정 장치의 구현)

  • Choi, Hyun-Jun;Seo, Young-Ho;Kim, Dong-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • pp.675-676
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    • 2012
  • In this paper, we are implemented the signal measurement system based on FPGA. The proposed hardware was mapped into Cyclone III from Altera and used 1,700(40%) of Logic Element (LE). The implemented circuit used 24,576-bit memory element with 6-bit input signal. The result from implementing in hardware (FPGA) could operate stably in 140MHz.

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Implementation of Wireless Controller with FPGA and Microprocessor (FPGA 및 마이크로프로세서를 적용한 무선컨트롤러 구현)

  • 윤성기;이규선;강병권
    • Proceedings of the Korea Multimedia Society Conference
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    • pp.405-408
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    • 2004
  • 본 논문에서는 FPGA와 마이크로프로세서를 이용하여 One Board화된 무선 콘트롤러 시스템의 기저대역부를 설계 하였다. 송신부에서는 컴퓨터와 연결된 마이크로프로세서부에서 컴퓨터를 통해 입력된 데이터를 병렬로 FPGA부로 전송하여 PN_code를 이용한 대역확산 거쳐 전송하고, 수신부에서는 대역역확산를 사용하여 데이터를 다시 수신측 마이크로프로세서를 통해 확인하였다. FPGA 설계는 Xilinx사의 FPGA 디자인 툴인 Xilinx Foundation3.1을 사용하였으며, FPGA configuration을 위한 타이밍 시뮬레이션을 수행하였고. Xilinx사의 SPARTAN2 2S100PQ208칩에 downloading 한 후 Agilent사의 1681A logic analyzer를 사용하여 설계된 회로의 동작을 확인 하였다. 또한 데이터의 입출력을 CPU부를 통해 컴퓨터에서 모니터링 할 수 있도록 설계하였다.

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Implementation of a Feed-Forward Neural Network on an FPGA Chip for Classification of Nonlinear Patterns (비선형 패턴 분류를 위한 FPGA를 이용한 신경회로망 시스템 구현)

  • Lee, Woon-Kyu;Kim, Jeong-Seob;Jung, Seul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.1
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    • pp.20-27
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    • 2008
  • In this paper, a nonlinear classifier of a feed-forward neural network is implemented on an FPGA chip. The feedforward neural network is implemented in hardware for fast parallel processing. After off line training of neural network, weight values are saved and used to perform forward propagation of neural processing. As an example, AND and XOR digital logic classification is conducted in off line, and then weight values are used in neural network. Experiments are conducted successfully and confirmed that the FPGA neural network hardware works well.

Hardware Implementation of an Intelligent Controller with a DSP and an FPGA for Nonlinear Systems (DSP와 FPGA를 이용한 지능 제어기의 하드웨어 구현)

  • 김성수
    • Journal of Institute of Control, Robotics and Systems
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    • v.10 no.10
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    • pp.922-929
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    • 2004
  • In this paper, we develop control hardware such as an FPGA based general purposed intelligent controller with a DSP board to solve nonlinear system control problems. PID control algorithms are implemented in an FPGA and neural network control algorithms are implemented in a BSP board. An FPGA was programmed with VHDL to achieve high performance and flexibility. The additional hardware such as an encoder counter and a PWM generator can be implemented in a single FPGA device. As a result, the noise and power dissipation problems can be minimized and the cost effectiveness can be achieved. To show the performance of the developed controller, it was tested fur nonlinear systems such as a robot hand and an inverted pendulum.

Efficient Simulation Acceleration by FPGA Compilation Avoidance (FPGA 컴파일 회피에 의한 효과적인 시뮬레이션 가속)

  • Shim, Kyu-Ho;Park, Chang-Ho;Yang, Sei-Yang
    • The KIPS Transactions:PartA
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    • v.14A no.3
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    • pp.141-146
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    • 2007
  • In this paper, we proposed an efficient FPGA-based simulation acceleration method based on FPGA compilation avoidance, which can effectively decrease the long debugging turnaround time incurred from the every debugging process in the functional verification. The proposed method had been experimentally applied to the functional verification for a microcontroller design. It had clearly shown that the debugging turnaround time was greatly reduced while the high simulation speed of the simulation acceleration was still maintained.