• Title/Summary/Keyword: Delay

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Singnalized Intersection Delay Model (신호교차로 지체모형)

  • 김영찬;이청원
    • Journal of Korean Society of Transportation
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    • v.9 no.2
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    • pp.27-40
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    • 1991
  • Delay is an widely-used tool for evaluating the operation of signalized intersections. This paper presents two mathematical models: a model converting stop delay into approach delay : and a model estimating delay at isolated signalized intersection. To develop the delay-conversion model, actual stop delay and approach delay experienced by individual vehicles were measured and then their relationship was formulated using ma-thematical procedure. the formula expressing the approach-delay to stop-delay ratio was a monotonously decreasing function of effective red time. New delay model was developed based on the following criteria; the fitness to measured delay for undersaturated traffic condition and the convergence to the deterministic overflow delay for oversaturated traffic condition. Performance of this model was better than those of other existing models based on the comparison study.

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Comparison of TDC Circuit Design Method to Constant Delay Time

  • Choi, Jin-Ho
    • Journal of information and communication convergence engineering
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    • v.8 no.4
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    • pp.461-465
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    • 2010
  • This paper describes the design method of Time-to-Digital Converter(TDC) to obtain the constant delay time and good reliability. The reliability property is described with delay elements. In TDC the time signal is converted to digital value which is based on delay elements for the time interpolation. To obtain the constant delay time, the first and the last delay elements have different structure compared to the middle delay elements. In the first and the last delay elements, the driving ability could be controlled for the different delay time. The delay element can be designed by analog and digital devices. The delay time of the element using analog devices is not sensitive to process parameters than that of the element using digital devices. And the TDC circuit by the elements using analog devices shows better reliability than that by the elements using digital devices also.

Performance Analysis of the Satellite Communication System Including the Grop Delay Characteristics (군지연 특성을 고려한 위성통신 시스템의 성능 분석)

  • 맹준호;유흥균;김기근;이대일;김도선
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.15 no.3
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    • pp.265-270
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    • 2004
  • This paper addresses the effect of group delay in satellite communication system. Phase of signal is distorted by the non-constant group delay. Group delay can be modeled as linear, parabolic and cubic type according to the polynomial characteristic. We investigate BER performance of satellite communication system with each 3 kinds of group delay. As signal bandwidth becomes wider, group delay makes more influence on the signal. BNR performance of satellite communication system is found when data rates are 1Mbps, 4Mbps and 8Mbps. Convolution coding with the code rate of 1/2 or 7/8 is used. At BER =10$\^$-5/, system with group delay needs more SNR of minimum 0.3㏈ to maximum 4.4㏈ than system without group delay. The worst case of BER performance happens in the linear group delay, 7/8 punctured convolution coding and 8 Mbps. The required SNR is increased by 4.4㏈ at this worst case.

Delay Time Reliability of Analog and Digital Delay Elements for Time-to-Digital Converter

  • Choi, Jin-Ho
    • Journal of information and communication convergence engineering
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    • v.8 no.1
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    • pp.103-106
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    • 2010
  • In this paper, the delay times were evaluated to develop highly reliable time-to-digital converter(TDC) in analog and digital delay element structures. The delay element can be designed by using current source or inverter. In case of using inverter, the number of inverter has to be controlled to adjust the delay time. And in case of using current source, the current for charging and discharging is controlled. When the current source is used the delay time of the delay element is not sensitive with varying the channel width of CMOS. However, when the inverter is used the delay time is directly related to the channel width of CMOS. Therefore to obtain good reliability in TDC circuit the delay element using current source is more stable compared to inverter in the viewpoint of the variation of fabrication process.

The Impact of Delay Optimization on Delay fault Testing Quality

  • Park, Young-Ho;Park, Eun-Sei
    • Journal of Electrical Engineering and information Science
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    • v.2 no.3
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    • pp.14-21
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    • 1997
  • In delay-optimized designs, timing failures due to manufacturing delay defects are more likely to occur because the average timing slacks of paths decrease and the system becomes more sensitive to smaller delay defect sizes. In this paper, the impact of delay optimized logic circuits on delay fault testing will be discussed and compared to the case for non-optimized designs. First, we provide a timing optimization procedure and show that the resultant density function of path delays is a delta function. Next we also discuss the impact of timing optimization on the yield of a manufacturing process and the defect level for delay faults. Finally, we will give some recommendations on the determination of the system clock time so that the delay-optimized design will have the same manufacturing yield as the non-optimized design and on the determination of delay fault coverage in the delay-optimized design in order to have the same defect-level for delay faults as the non-optimized design, while the system clock time is the same for both designs.

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Tunable Composite Right/Left-Handed Delay Line with Large Group Delay for an FMCW Radar Transmitter

  • Park, Yong-Min;Ki, Dong-Wook
    • Journal of electromagnetic engineering and science
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    • v.12 no.2
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    • pp.166-170
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    • 2012
  • This paper presents a tunable composite right/left-handed (CRLH) delay line for a delay line discriminator that linearizes modulated frequency sweep in a frequency modulated continuous wave (FMCW) radar transmitter. The tunable delay line consists of 8 cascaded unit cells with series varactor diodes and shunt inductors. The reverse bias voltage of the varactor diode controlled the group delay through its junction capacitance. The measured results demonstrate a group delay of 8.12 ns and an insertion loss of 4.5 dB at 250 MHz, while a control voltage can be used to adjust the group delay by approximately 15 ns. A group delay per unit cell of approximately 1 ns was obtained, which is very large when compared with previously published results. This group delay can be used effectively in FMCW radar transmitters.

X-band Microwave Photonic Filter Using Switch-based Fiber-Optic Delay Lines

  • Jung, Byung-Min
    • Current Optics and Photonics
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    • v.2 no.1
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    • pp.34-38
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    • 2018
  • An X-band microwave photonic (MWP) filter using switch-based fiber-optic delay lines has been proposed and experimentally demonstrated. It is composed of two electro-optic modulators (EOMs) and $2{\times}2$ optical MEMS-switch-based fiber-optic delay lines. By changing time-delay difference and coefficients of each wavelength signal by using fiber-optic delay lines and an electro-optic modulator, respectively, a bandpass filter or a notch filter can be implemented. For an X-band MWP filter with four channel elements, fiber-optic delay lines with the unit time-delay of 50 ps have been experimentally realized and the frequency responses corresponding to the time-delays has been measured. The measured frequency response error at center frequency and the time-delay difference error were 180 MHz at 10 GHz and 3.2 ps, respectively, when the fiber-optic delay line has the time-delay difference of 50 ps.

Efficient Method for Elmore Delay Error Correction for Placement (배치를 위한 효율적인 Elmore Delay 오차 보상 방법)

  • Kim, Sin-Hyeong;Im, Won-Taek;Kim, Sun-Kwon;Shin, Hyun-Cheul
    • Journal of KIISE:Computer Systems and Theory
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    • v.29 no.6
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    • pp.354-360
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    • 2002
  • Delay estimation must be simple and efficient, since millions or more delay calculations may be required during a timing-driven placement stage. We have developed a new Modified Elmore delay estimation method, which is significantly more accurate than the original Elmore delay by considering resistance shielding effects, but has the same order of complexity with that of Elmore delay. Experimental results show that the suggested technique can significantly reduce the error in estimated delay, from 31.6 ~ 145.2% to 2.5 ~ 22.7%.

A Study on Preschoolers' Intelligent Ability, Reward Choice in Assumed Situation and Delay of Gratification Ability (유아의 지적능력, 가상상황에서의 보상선택유형 및 만족지연능력에 관한 연구)

  • Kim Hye-Soon
    • Journal of Families and Better Life
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    • v.24 no.3 s.81
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    • pp.15-25
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    • 2006
  • This study has been performed to identify intelligent ability, reward choice in assumed situation of delay of gratification, and delay of gratification ability. The subjects for this study were 100 preschoolers between the ages of 4 and 5, their mothers, and 15 teachers of three day-care centers in Seoul. T-test, F-test, Correlation analysis and multiple regression analysis were used for data analysis. The main results of this study were as follows: First, preschoolers' delay of gratification ability by mothers' educational background was significant and delay of gratification ability by sex was significant. This means that mothers who had a higher educational background were positively related to preschoolers' delay of gratification ability. Second, in an assumed situation of delay of gratification, preschoolers' delay of gratification ability by reward choice was not significant. Third, delay of gratification by intelligent ability was significant. Fourth, the correlation among intelligent ability, reward choice in assumed situation of delay of gratification and delay of gratification ability were significant. Finally, preschoolers' delay of gratification ability was significantly influenced by two factors: reward choice in assumed situation of delay of gratification and preschoolers' intelligent ability.

A Case Study on Reason Analysis for Schedule Delay of Apartment House (공동주택의 공기지연 원인분석 사레 연구)

  • Park, Chang-Wook;Yun, Seok-Heon
    • Journal of the Korea Institute of Building Construction
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    • v.9 no.1
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    • pp.89-94
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    • 2009
  • A study was performed the analysis for the schedule delay of the public housing. To perform this study, the first study existing research literature on the cause of the schedule delay was considered. The based on existing study, this study selected the cause of schedule delay. For check of the schedule delay, this study was compared the monthly schedule and the work diary. Survey was conducted for using the selected cause of schedule delay. And the importance was calculated for using the AHP method. In a case site, the cause of the schedule delay was analyzed. The last, the delay cause was presented the map of cause of effect the based on the delay cause of a case site.