• Title, Summary, Keyword: DLTS method

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The Passivation of GaAs Surface by Laser CVD

  • Sung, Yung-Kwon;Song, Jeong-Myeon;Moon, Byung-Moo;Rhie, Dong-Hee
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.12S
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    • pp.1242-1247
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    • 2003
  • In order to passivate the GaAs surface, silicon-nitride films were fabricated by using laser CVD method. SiH$_4$ and NH$_3$ were used to obtain SiN films in the range of 100∼300$^{\circ}C$ on p-type (100) GaAs substrate. To determine interface characteristics of the metal-insulator-GaAs structure, electrical measurements were performed such as C-V curves and deep level transient spectroscopy (DLTS). The results show that the hysteresis was reduced and interface trap density was lowered to 1,012 ∼ 1,013 at 100 ∼ 200$^{\circ}C$. According to the study of surface leakage current, the passivated CaAs has less leakage current compared to non-passivated substrate.

Oxygen Plasma Effect on AlGaN/GaN HEMTs Structure Grown on Si Substrate

  • Seo, Dong Hyeok;Kang, Sung Min;Lee, Dong Wha;Ahn, Du Jin;Park, Hee Bin;Ahn, Youn Jun;Kim, Min Soo;Kim, Yu Kyeong;Lee, Ho Jae;Song, Dong Hun;Kim, Jae Hee;Bae, Jin Su;Cho, Hoon Young
    • Proceedings of the Korean Vacuum Society Conference
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    • pp.420-420
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    • 2013
  • We investigated oxygen plasma effect on defect states near the interface of AlGaN/GaN High Electron Mobility Transistor (HEMT) structure grown on a silicon substrate. After the plasma treatment, electrical properties were evaluated using a frequency dependant Capacitance-Voltage (C-V) and a temperature dependant C-V measurements, and a deep level transient spectroscopy (DLTS) method to study the change of defect densities. In the depth profile resulted from the temperature dependant C-V, a sudden decrease in the carrier concentration for two-dimensional electron gas (2DEG) nearby 250 K was observed. In C-V measurement, the interface states were improved in case of the oxygen-plasma treated samples, whereas the interface was degraded in case of the nitrogen-plasma treated sample. In the DLTS measurement, it was observed the two kinds of defects well known in AlGaN/GaN structure grown on sapphire substrate, which have the activation energies of 0.15 eV, 0.25 eV below the conduction band. We speculate that this defect state in AlGaN/GaN on the silicon substrate is caused from the decrease in 2DEG's carrier concentrations. We compared the various DLTS signals with filling pulse times to identify the characteristics of the newly found defect. In the filling pulse time range under the 80 us, the activation energies changed as the potential barrier model. On the other hand, in the filling pulse time range above the 80 us, the activation energies changed as the extended potential model. Therefore, we suggest that the found defect in the AlGaN/GaN/Si structure could be the extended defect related with AlGa/N/GaN interface states.

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A study on point defects induced with neutron irradiation in silicon wafer (중성자 조사에 의해 생성된 점결함 연구)

  • 김진현;류근걸
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • pp.62-66
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    • 2002
  • The conventional floating zone(FZ) crystal and Czochralski(CZ) silicon crystal have resistivity variations longitudinally as well as radially The resistivity variations of the conventional FZ and CZ crystal are not conformed to requirement of dopant distribution for power devices and thyristors. These resistivity variations in conventional cystals limits the reverse breakdown voltage that could be achieved and forced designers of high power diodes and thyristors to compromise the desired current-voltage characteristics. So to produce high Power diodes and thyristors, Neutron Transmutation Doping(NTD) technique is the one method just because NTD silicon provides very homogeneous distribution of doping concentration. This procedure involves the nuclear transmutation of silicon to phosphorus by bombardment of neutron to the crystal according to the reaction $^{30}$ Si(n,${\gamma}$)longrightarrow$^{31}$ Silongrightarrow(2.6 hr)$^{31}$ P+$\beta$$^{[-10]}$ . The radioactive isotope $^{31}$ Si is formed by $^{31}$ Si capturing a neutron, which then decays into the stable $^{31}$ P isotope (i.e., the donor atom), whose distribution is not dependent on the crystal growth parameters. In this research, neutron was irradiated on FZ silicon wafers which had high resistivity(1000~2000 Ω cm), for 26 and 8.3hours for samples of HTS-1 and HTS-2, and 13, 3.2, 2.0 hours for samples of IP-1, IP-2 and IP-3, respectively, to compare resistivity changes due to time differences. The designed resistivities were approached, which were 2.l Ωcm for HTS-1, 7.21 Ω cm for HTS-2, 1.792cm for IP-1, 6.83 Ωcm for IP-2, 9.23 Ωcm for IP-3, respectively. Point defects were investigated with Deep Level Transient Spectroscopy(DLTS). Four different defects were observed at 80K, 125K, 230K, and above 300K.

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Physical Characterization of GaAs/$\textrm{Al}_{x}\textrm{Ga}_{1-x}\textrm{As}$/GaAs Heterostructures by Deep Level transient Spectroscopy (DLTS 방법에 의한 GaAs/$\textrm{Al}_{x}\textrm{Ga}_{1-x}\textrm{As}$/GaAs 이종구조의 물성분석에 관한 연구)

  • Lee, Won-Seop;Choe, Gwang-Su
    • Korean Journal of Materials Research
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    • v.9 no.5
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    • pp.460-466
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    • 1999
  • The deep level electron traps in AP-MOCVD GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures have been investigated by means of Deep Level Transient Spectroscopy DLTS). In terms of the experimental procedure, GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures were deposited on 2" undoped semi-insulating GaAs wafers by the AP-MOCVD method at $650^{\circ}C$ with TMGa, AsH3, TMAl, and SiH4 gases. The n-type GaAs conduction layers were doped with Si to the target concentration of about 2$\times$10\ulcornercm\ulcorner. The Al content was targeted to x=0.5 and the thicknesses of Al\ulcornerGa\ulcornerAs layers were targeted from 0 to 40 nm. In order to investigate the electrical characteristics, an array of Schottky diodes was built on the heterostructures by the lift-off process and Al thermal evaporation. Among the key results of this experiment, the deep level electron traps at 0.742~0.777 eV and 0.359~0.680 eV were observed in the heterostructures; however, only a 0.787 eV level was detected in n-type GaAs samples without the Al\ulcornerGa\ulcornerAs overlayer. It may be concluded that the 0.787 eV level is an EL2 level and that the 0.742~0.777 eV levels are related to EL2 and residual oxygen impurities which are usually found in MOCVD GaAs and Al\ulcornerGa\ulcornerAs materials grown at $630~660^{\circ}C$. The 0.359~0.680 eV levels may be due to the defects related with the al-O complex and residual Si impurities which are also usually known to exist in the MOCVD materials. Particularly, as the Si doping concentration in the n-type GaAs layer increased, the electron trap concentrations in the heterostructure materials and the magnitude of the C-V hysteresis in the Schottky diodes also increased, indicating that all are intimately related.ated.

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The Charge Trapping Properties of ONO Dielectric Films (재산화된 질화산화막의 전하포획 특성)

  • 박광균;오환술;김봉렬
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.8
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    • pp.56-62
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    • 1992
  • This paper is analyzed the charge trapping and electrical properties of 0(Oxide), NO(Nitrided oxide) and ONO(Reoxidized nitrided oxide) as dielectric films in MIS structures. We have processed bottom oxide and top oxide by the thermal method, and nitride(Si$_{3}N_{4}$) by the LPCVD(Low Pressure Chemical Vapor Deposition) method on P-type(100) Silicon wafer. We have studied the charge trapping properties of the dielectrics by using a computer controlled DLTS system. All of the dielectric films are shown peak nearly at 300K. Those are bulk traps. Many trap densities which is detected in NO films, but traps. Many trap densities which is detected in NO films. Varing the nitride thickness, the trap densities of thinner nitride is decreased than the thicker nitride. Finally we have found that trap densities of ONO films is affected by nitride thickness.

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The passivation of III-V compound semiconductor surface by laser CVD (Laser CVD법에 의한 III-V화합물 반도체 표면의 불활성화)

  • Lee, H.S.;Lee, K.S.;Cho, T.H.;Huh, Y.J.;Kim, S.J.;Sung, Y.K.
    • Proceedings of the KIEE Conference
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    • pp.1274-1276
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    • 1993
  • The silicon-nitride films formed by laser CVD method are used for passivating GaAs surfaces. The electrical Properties of metal-insulator-GaAs structure are studied to determined the interfacial characteristics by C-V curves and deep level transient spectroscopy(DLTS). The SiN films are photolysisly deposited from $SiH_4\;and\;NH_3$ in the range of $100^{\circ}C-300^{\circ}C$ on P type, (100) GaAs. The hysteresis is reduced and interface trap density is lowered to $10^{12}-10^{13}$ at $100^{\circ}C-200^{\circ}C$. The surface leakage current is studied too. The passivated GaAs have a little leakage current compared to non passivated GaAs.

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Hydrogenation on Defect Levels of GaAs Epilayer on Si (Si 위에 성장시킨 GaAs 에피층의 Defect Level에 대한 수소화)

  • Bae, In-Ho;Kang, Tae-Won;Hong, Chi-Yhou;Leem, Jae-Young;Cho, Sung-Hwan;Jang, Jin;Lee, Wan-Ho
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.1
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    • pp.68-73
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    • 1990
  • GaAs epilayer was grown on Si(100) substrate using the two-step growth method by MBE. The crystal growth mode have been investigated by RHEED. The hydrogenation effects of GaAs epilayer were studied by DLTS and Raman spectroscopy. The four electron traps in GaAs/Si layer were observed and their activation energy ranged from 0.47 eV to 0.81 eV below the conduction band. After hydrogenation at 250\ulcorner for 3 hours, new trap not observed and electron traps at Ec-0.68, 0.54 and 0.47 eV were almost passivated. Whereas the Ec-0.81 eV level showed no significant change in concentration. From Raman measurement, GaAs epilayer is found to be influenced by the tensile stress.

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Anodically Oxidized InP Schottky Diodes Grown From EDMIn and TBP on GaAs Substrates (GaAs 기판 위에 EDMIn과 TBP로부터 성장되고 양극산화 처리된 InP Schottky Diode)

  • 유충현
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.6
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    • pp.471-476
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    • 2003
  • Au/oxide/n-InP Schottky diodes were fabricated from heteroepitaxial InP layers grown on GaAs substrates by the metalorganic vapor phase epitaxy (MOVPE) method from a new combination of source materials: ethyldimethylindium (EDMIn) and tertiarybutylphosphine (TBP). Anodic oxidation technique by using a solution of 10 g of ammonium pentaborate in 100 cc of ethylene glycole as the electrolyte was used to deposit a thin oxide layer. The barrier heights determined from three different techniques, current-voltage (I-V) measurements at room temperature and in the temperature range of 273 K - 373 K, and room temperature capacitance-voltage (C-V) measurements are in good agreement, 0.7 - 0.9 eV which is considerably high as compared to the 0.45 - 0.55 eV in Au/n-InP Schottky diode without a Passivation layer. The ideality factors of 1.1 - 1.3 of the Schottky diodes were also determined from the I-Y characteristics. Deep level transient spectroscopy (DLTS) studies revealed only one shallow electron state at 92.6 meV below the bottom of the conduction band and no deep state in the heteroepitaxial InP layers grown from EDMIn and TBP.