• Title, Summary, Keyword: Asynchronous

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Asynchronous 2-Phase Protocol Based on Ternary Encoding for On-Chip Interconnect

  • Oh, Myeong-Hoon;Kim, Seong-Woon
    • ETRI Journal
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    • v.33 no.5
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    • pp.822-825
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    • 2011
  • Level-encoded dual-rail (LEDR) has been widely used in onchip asynchronous interconnects supporting a 2-phase handshake protocol. However, it inevitably requires 2N wires for N-bit data transfers. Encoder and decoder circuits that perform an asynchronous 2-phase handshake protocol with only N wires for N-bit data transfers are presented for on-chip global interconnects. Their fundamentals are based on a ternary encoding scheme using current-mode multiple valued logics. Using 0.25 ${\mu}m$ CMOS technologies, the maximum reduction ratio of the proposed circuits, compared with LEDR in terms of power-delay product, was measured as 39.5% at a wire length of 10 mm and data rate of 100 MHz.

A New Hardening Technique Against Radiation Faults in Asynchronous Digital Circuits Using Double Modular Redundancy (이중화 구조를 이용한 비동기 디지털 시스템의 방사선 고장 극복)

  • Kwak, Seong Woo;Yang, Jung-Min
    • Journal of Institute of Control, Robotics and Systems
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    • v.20 no.6
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    • pp.625-630
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    • 2014
  • Asynchronous digital circuits working in military and space environments are often subject to the adverse effects of radiation faults. In this paper, we propose a new hardening technique against radiation faults. The considered digital system has the structure of DMR (Double Modular Redundancy), in which two sub-systems conduct the same work simultaneously. Based on the output feedback, the proposed scheme diagnoses occurrences of radiation faults and realizes immediate recovery to the normal behavior by overriding parts of memory bits of the faulty sub-system. As a case study, the proposed control scheme is applied to an asynchronous dual ring counter implemented in VHDL code.

Efficient Congestion Control Utilizing Message Eavesdropping in Asynchronous Range-Based Localization

  • Choi, Hoon;Baek, Yunju;Lee, Ben
    • ETRI Journal
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    • v.35 no.1
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    • pp.35-40
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    • 2013
  • Asynchronous ranging is one practical method to implement a locating system that provides accurate results. However, a locating system utilizing asynchronous ranging generates a large number of messages that cause transmission delays or failures and degrades the system performance. This paper proposes a novel approach for efficient congestion control in an asynchronous range-based locating system. The proposed method significantly reduces the number of messages generated during the reader discovery phase by eavesdropping on other transmissions and improves the efficiency of ranging by organizing the tags in a hierarchical fashion in the measurement phase. Our evaluation shows that the proposed method reduces the number of messages by 70% compared to the conventional method and significantly improves the success rate of ranging.

Study on Transient Improvement through Governor Control under Asynchronous Transition of CTTS (CTTS의 비동기 절체 시 조속기 제어를 통한 과도 개선에 관한 연구)

  • Kang, Byoung-Wook;Chai, Hui-Seok;Han, Woon-Ki;Lim, Hyun-Sung;Kwon, Seung-Ok;Kim, Jae-Chul
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.11
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    • pp.47-52
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    • 2015
  • This paper derives the problems that occur when asynchronous transfer in case of phase, frequency, voltage between the emergency generator and the grid and proposed the countermeasure to solve this problem when the transfer switch replace ATS(Automatic Transfer Switch) with CTTS(Closed Transition Transfer Switch) for the non-interrupting switching. In order to simulate above cases, modelling was used the transient analysis program PSCAD/EMTDC. By using this, the customer installed emergency generator and the grid was implemented. We compared three cases of asynchronous transition based on the basic case and proposed improvement by controlling the governor of emergency generator.

A Proactive Dynamic Spectrum Access Method against both Erroneous Spectrum Sensing and Asynchronous Inter-Channel Spectrum Sensing

  • Gu, Junrong;Jang, Sung-Jeen;Kim, Jae-Moung
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.6 no.1
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    • pp.361-378
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    • 2012
  • Most of the current frequency hopping (FH) based dynamic spectrum access (DSA) methods concern a reactive channel access scheme with synchronous inter-channel spectrum sensing, i.e., FH is reactively triggered by the primary user (PU)'s return reported by spectrum sensing, and the PU channel to be switched to is assumed precisely just sensed or ready to be sensed, as if the inter-channel spectrum sensing moments are synchronous. However, the inter-channel spectrum sensing moments are more likely to be asynchronous, which risks PU suffering more interference. Moreover, the spectrum sensing is usually erroneous, which renders the problem more complex. To address this problem, we propose a proactive FH based DSA method against both erroneous spectrum sensing and asynchronous inter-channel spectrum sensing (moments). We term it as proactive DSA. The optimal FH sequence is obtained by dynamic programming. The complexity is also analyzed. Finally, the simulation results confirm the effectiveness of the proposed method.

Multisensor Bias Estimation with Serial Fusion for Asynchronous Sensors (순차적 정보융합을 이용한 비동기 다중 레이더 환경에서의 바이어스 추정기법)

  • Kim, Hyoung Won;Park, Hyo Dal;Song, Taek Lyul
    • Journal of the Korea Institute of Military Science and Technology
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    • v.15 no.5
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    • pp.676-686
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    • 2012
  • This paper presents a sensor bias estimation method with serial fusion for asynchronous multisensory systems. Serial fusion processes the sensor measurements in a first-come-first-serve basis and it plays an essential role in asynchronous fusion in practice. The proposed algorithm generates the bias measurements using fusion estimates and sensor measurements for bias estimation, and compensates the sensor biases in fusion tracks. A simulation study indicates that the proposed algorithm has the superior performance in bias estimation and accurate tracking.

Design of Asynchronous 16-Bit Divider Using NST Algorithm (NST알고리즘을 이용한 비동기식 16비트 제산기 설계)

  • 이우석;박석재;최호용
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.3
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    • pp.33-42
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    • 2003
  • This paper describes an efficient design of an asynchronous 16-bit divider using the NST (new Svoboda-Tung) algorithm. The divider is designed to reduce power consumption by using the asynchronous design scheme in which the division operation is performed only when it is requested. The divider consists of three blocks, i.e. pre-scale block, iteration step block, and on-the-fly converter block using asynchronous pipeline structure. The pre-scale block is designed using a new subtracter to have small area and high performance. The iteration step block consists of an asynchronous ring structure with 4 division steps for area reduction. In other to reduce hardware overhead, the part related to critical path is designed by a dual-rail circuit, and the other part is done by a single-rail circuit in the ring structure. The on-the-fly converter block is designed for high performance using the on-the-fly algorithm that enables parallel operation with iteration step block. The design results with 0.6${\mu}{\textrm}{m}$ CMOS process show that the divider consists of 12,956 transistors with 1,480 $\times$1,200${\mu}{\textrm}{m}$$^2$area and average-case delay is 41.7㎱.

Test Pattern Generation for Asynchronous Sequential Circuits Operating in Fundamental Mode (기본 모드에서 동작하는 비동기 순차 회로의 시험 벡터 생성)

  • 조경연;이재훈;민형복
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.9
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    • pp.38-48
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    • 1998
  • Generating test patterns for asynchronous sequential circuits remains to be a very difficult problem. There are few algorithms for this problem, and previous works cut feedback loops, and insert synchronous flip-flops in the feedback loops during ATPG. The conventional algorithms are similar to the algorithms for synchronous sequential circuits. This means that the conventional algorithms generate test patterns by modeling asynchronous sequential circuits as synchronous sequential circuits. So, test patterns generated by those algorithms nay not detect target faults when the test patterns are applied to the asynchronous sequential circuit under test. In this paper an algorithm is presented to generate test patterns for asynchronous sequential circuits. Test patterns generated by the algorithm can detect target faults for asynchronous sequential circuits with the minimal possibility of critical race problem and oscillation. And it is guaranteed that the test patterns generated by the algorithm will detect target faults.

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A new interfacing circuit for low power asynchronous design in sensor systems (센서시스템에서의 저전력 비동기 설계를 위한 인터페이싱 회로)

  • Ryu, Jeong Tak;Hong, Won Kee;Kang, Byung Ho;Kim, Kyung Ki
    • Journal of the Korea Industrial Information Systems Research
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    • v.19 no.1
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    • pp.61-67
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    • 2014
  • Conventional synchronous circuits in low power required systems such as sensor systems cannot only satisfy the timing requirement of the low voltage digital systems, but also they may generate wrong outputs under the influence of PVT variations and aging effects. Therefore, in the reliable ultra-low power design, asynchronous circuits have recently been reconsidered as a solution for scaling issues. However, it is not easy to totally replace synchronous circuits with asynchronous circuits in the digital systems, so the interfacing between the synchronous and asynchronous circuits is indispensable for the digital systems. This paper presents a new design for interfacing between asynchronous circuits and synchronous circuits, and the interface circuits are applied to a $4{\times}4$ multiplier logic designed using 0.11um technology.

Design and Implementation of Integrated E-Coaching system Based on Synchronous and Asynchronous (동기/비동기 기반의 통합 E-코칭 시스템 설계 및 구현)

  • Kim, DoYeon;Kim, DoHyeun
    • The Journal of The Institute of Internet, Broadcasting and Communication
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    • v.15 no.4
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    • pp.1-7
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    • 2015
  • Until now, face to face coaching has been applied almost for completing the goal in various field. Face to face coaching is difficult always to reach each other anywhere, anytime due to the availability of internet and mobile devices. Recently, e-coaching is attempted to expend. But current e-coaching is supporting the secondary role for face to face coaching. E-coaching system has many benefits to use advancement technologies in internet. Therefore, the development of e-coaching system based on horizontal relationships between coach and coachee needs to communication anytime and anywhere in Internet. Usually previous online coaching systems have four types of interactions i.e. electronic mail, video chat, text chat, phone call. Most of the e-coaching approaches are easy to access and provide communication synchronous; video chat is an excellent visibility, whereas e-mail is asynchronous and document-centric. In this paper, we design and implement the integration e-coaching system based on synchronous and asynchronous. This system provides the asynchronous coaching offered by way of e-mail, and the synchronous coaching used P2P (Peer to Peer) video chat and text group chat. This system allows simultaneously asynchronous and synchronous coaching, and supports individual and group communication for periodical or informal coaching.