• Title, Summary, Keyword: 2 stage LNA

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Design and Characteristics of X-band Monolitic Series Feedback LNA using 0.5$\mu\textrm{m}$GaAs MESFET (0.5$\mu\textrm{m}$-GaAs MESFET을 이용한 X-밴드 모노리식 직렬 궤환 LNA의 설계 및 특성)

  • 전영진;김진명;정윤하
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.34D no.5
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    • pp.7-13
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    • 1997
  • A X-band 3-stage monolithic LNA (low noise amplifier) with series feedback has been successfully desined and demonstrated by suign 0.5-$\mu\textrm{m}$ GaAs MESFET. In the design of the 3-stage LNA, the effects of series feedback to the noise figure, the gain, and the stability have been investigated ot find the optimal short stub length. As a result, the inductive series feedback topology which has 10degree short stub in the GaAs MESFET source lead, has been employed in the 1-st stage. The fabricated MMIC LNA's chip size is only 1mm$^{2}$/stage, which is smaller than the previously reported X-band MMIC input/output return losses are less than -10dB and -15dB, respectively. The noise figure (NF) is less than 2.6dB. The measured data show good agreement with the simulated values.

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Design of High Gain Low Noise Amplifier for Bluetooth (블루투스 고이득 저잡음 증폭기 설계)

  • 손주호;최석우;김동용
    • Journal of Korea Multimedia Society
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    • v.6 no.1
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    • pp.161-166
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    • 2003
  • This paper presents a high gain LNA for a bluetooth application using 0.25$\mu\textrm{m}$ CMOS technology. The conventional one stage LNA has a low power gain. The presented one stage LNA using a cascode inverter LNA with a voltage reference and without a choke inductor has an improved Power gain. Simulation results of the 2.4GHz designed LNA shows a high power gain of 21dB, a noise figure of 2.2dB, and the power consumption of 255mW at 2.5V power supply.

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A Study on Design of 2-stage LNA of LNB module for Ku-band (Ku-Band 위성통신용 LNB 수신단의 2단 LNA 설계)

  • Kwak, Yong-Soo;Kim, Hyeong-Seok
    • Proceedings of the KIEE Conference
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    • pp.2318-2320
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    • 2005
  • In this paper, a low noise amplifier(LNA) in a receiver of a Low Noise Block Down Converter (LNB) for direct broadcasting service(DBS) is implemented using GaAs HEMT. The LNA is designed for the bandwidth of 11.7GHz-12.2GHz. The 2stage-LNA consists of a input matching circuit, a output matching circuit, DC-blocks and RF-chokes. The result of a simulation of the LNA using Advanced Design System(ADS) shows the noise figure less than 1.4dB, the gain greater than 23dB and the flatness of 1dB in the bandwidth of 11.7 to 12.2GHz.

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A Study on Design of Two-Stage LNA for Ku-Band LNB Receiving Block (Ku-Band 위성통신용 LNB 수신단의 2단 저잡음 증폭기 설계에 관한 연구)

  • Kim Hyeong-Seok;Kwak Yong-Soo
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.55 no.2
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    • pp.100-105
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    • 2006
  • In this paper, a low noise amplifier(LNA) in a receiver of a low noise block down converter (LNB) for direct broadcasting service(DBS) is implemented using GaAs HEMT. The LNA is designed for the bandwidth of 11.7 GHz-12.2 GHz. The two-stage LNA consists of a input matching circuit, a output matching circuit, DC-blocks and RF-chokes. Experimental results of the LNA show the noise figure less than 1.4 dB, the gain greater than 23 dB and the flatness of 1 dB in the bandwidth of 11.7 to 12.2 GHz.

40-㎓-band Low Noise Amplifier MMIC with Ultra Low Gain Flatness

  • Chang, Woo-Jin;Lee, Jin-Hee;Yoon, Hyung-Sup;Shim, Jae-Yeob;Lee, Kyung-Ho
    • Proceedings of the IEEK Conference
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    • pp.654-657
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    • 2002
  • This paper introduces the design and implementation of 40-㎓-band low noise amplifier (LNA) with ultra low gain flatness for wide-band wireless multimedia and satellite communication systems. The 40-㎓-band 4-stage LNA MMIC (Monolithic Microwave Integrated Circuit) demonstrates a small signal gain of more than 20 ㏈, an input return loss of 10.3 ㏈, and an output return loss of 16.3 ㏈ for 37$\square$42 ㎓. The gain flatness of the 40-㎓-band 4-stage LNA MMIC was 0.1 ㏈ for 37$\square$42 ㎓. The noise figure of the 40 ㎓-band LNA was simulated to be less than 2.7 dB for 37~42 ㎓. The chip size of the 4-stage LNA MMIC was 3.7${\times}$1.7 $\textrm{mm}^2$.

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Design of Low Power CMOS LNA for using Current Reuse Technique (전류 재사용 기법을 이용한 저전력 CMOS LNA 설계)

  • Cho In-Shin;Yeom Kee-Soo
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.8
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    • pp.1465-1470
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    • 2006
  • This paper presents a design of low power CMOS LNA(Low Noise Amplifier) for 2.4 GHz ZigBee applications that is a promising international standard for short area wireless communications. The proposed circuit has been designed using TSMC $0.18{\mu}m$ CMOS process technology and two stage cascade topology by current reuse technique. Two stage cascade amplifiers use the same bias current in the current reused stage which leads to the reduction of the power dissipation. LNA design procedures and the simulation results using ADS(Advanced Design System) are presented in this paper. Simulation results show that the LNA has a extremely low power dissipation of 1.38mW with a supply voltage of 1.0V. This is the lowest value among LNAs ever reported. The LNA also has a maximum gain of 13.38dB, input return loss of -20.37dB, output return loss of -22.48dB and minimum noise figure of 1.13dB.

Design of Ka-Band 3 Stage MMIC Low Noise Amplifiers (KaBand 3단 MMIC 저잡음 증폭기 설계)

  • 염인복;정진철;이성팔
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • pp.216-219
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    • 2000
  • A Ka Band 3-stage MMIC (Monolithic Microwave Integrated Circuits) LNA(Low Noise Amplifiers) has been designed. The MMIC LNA consists of two single-ended type amplication stapes and one balanced type amplication stage to satisfy noise figure characteristics and high gain and amplitude linearity. The 0.15um pHEMT has been used to provide a ultra low noise figure and high gain amplification. Series and Shunt feedback circuits were inserted to ensure high stability over frequency range of DC to 80 GHz. The size of designed MMIC LNA is 3100mm ${\times}$ 2400um(7.44$\textrm{mm}^2$). The on wafer measured noise figure of the MMIC LNA is less than 2.0 dB over frequency range of 22 GHz to 30 GHz.

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Improving the Linearity of CMOS LNA Using the Post IM3 Compensator

  • Kim, Jin-Gook;Park, Chang-Joon;Kim, Hui-Jung;Kim, Bum-Man;Kim, Young-Sik
    • Journal of electromagnetic engineering and science
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    • v.7 no.2
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    • pp.91-95
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    • 2007
  • In this paper, a new linearization method has been proposed for a CMOS low noise amplifier(LNA) using the Post IM3 Compensator. The fundamental operating theory of the proposed method is to cancel the IM3 components of the LNA output signal by generating another IM3 components, which are out-phase with respect to that of the LNA, from the Post IM3 Compensator. A single stage common-source LNA has been designed to verify the linearity improvement of the proposed method through $0.13{\mu}m$ RF CMOS process for WiBro system. The designed LNA achieves +7.8 dBm of input-referred 3^{rd}$-order intercept point (IIP3) with 13.2 dB of Power Gain, 1.3 dB of noise figure and 5.7mA @1.5V power consumption. IIP3 is compared with a conventional single stage common-source LNA, and it shows IIP3 is increased by +12.5 dB without degrading other features such as gain and noise figure.

Design of Low Power CMOS LNA for 2.4 GHz ZigBee Applications (2.4 GHz ZigBee 응용을 위한 저전력 CMOS LNA 설계)

  • Cho In-Shin;Yeom Kee-Soo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • pp.259-262
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    • 2006
  • This paper presents a design of low power CMOS LNA(Low Noise Amplifier) for 2.4 GHz ZigBee applications. The proposed circuit has been designed by using TSMC $0.18{\mu}m$ CMOS process and current-reused two-stage cascade topology. LNA design procedures and the simulation results using ADS(Advanced Design System) are presented in this paper. Simulation results shows that the LNA has a extremely low power dissipation of 1.38mW with a $V_{DD}$ of 1.0V. The LNA also has a maximum gain of 13.38dB, input return loss of -20.37dB, output return loss of -22.48dB and noise figure of 1.13dB.

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Design of LNA and Mixer for Ku-band Receiver (Ku 밴드 수신단을 위한 저잡음 증폭기 및 주파수 혼합기 설계)

  • Choi, Hyuk-Jae;Ko, Jae-Hyeong;Kim, Koon-Tae;Lee, Je-Kwang;Kim, Hyeong-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.61 no.2
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    • pp.257-262
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    • 2012
  • The Ministry of Information-Communication assigned 18~19GHz frequency band for communication of cabins and platform to link between subway/train and it's station. In this paper, we propose wireless transmission devices which are 2 stage hybrid low noise amplifier of 18GHz band and mixer for 18GHz as well to apply for RF receiver. We designed LNA to be noise matched its 1st stage and gain matched for 2nd stage and mixer using $180^{\circ}$ hybrid coupler to suppress the spurious signal. The transistors of 18 GHz LNA and mixer are NE3210S01 of NEC and KMB-N51-1, respectively. As the result of simulation, we get 19.92dB gain and 2.06dB noise figure with LNA and 8.61dB conversion loss with mixer.