Implementation of Multilevel Boost DC-Link Cascade based Reversing Voltage Inverter for Low THD Operation

  • Rao, S. Nagaraja ;
  • Kumar, D.V. Ashok ;
  • Babu, Ch. Sai
  • Received : 2017.09.15
  • Accepted : 2018.01.26
  • Published : 2018.07.01


In this paper, configuration of $1-{\phi}$ seven-level boost DC-link cascade based reversing voltage multilevel inverter (BDCLCRV MLI) is proposed for uninterrupted power supply (UPS) applications. It consists of three level boost converter, level generation unit and full bridge circuit for polarity generation. When compared with conventional boost cascaded H-bridge MLI configurations, the proposed system results in reduction of DC sources, reduced power switches and gate drive requirements. Inverter switching is accomplished by providing appropriate switching angles that is generated by any optimization switching angle techniques. Here, round modulation control (RMC) method is taken as the optimization method and switching angles are derived and the same is compared with various switching angles methods i.e., equal-phase (EP) method, and half-equal-phase (HEP) method which results in improved quality of obtained AC power with lowest total harmonic distortion (THD). Reduction in DC sources and switch count makes the system more cost effective. A simulation and prototype model of $1-{\phi}$ seven-level BDCLCRV MLI system is developed and its performance is analyzed for various operating conditions.


Multilevel boost converter;Cascaded RV inverter;EP;HEP;RMC


  1. Ragupathy, Uthandipalayam Subramaniyam, Ramasami Uthirasamy and Venkatachalam Kumar Chinnaiyan. "Structure of boost DC-link cascaded multilevel inverter for uninterrupted power supply applications," IET Power Electronics, vol. 8, no. 11, pp. 2085-2096, 2015. doi: 10.1049/iet-pel.2014.0746.
  2. J. RodrIguez, J.S. Lai, and F.Z. Peng," Multilevel Inverters: A Survey of Topologies, Controls, and Applications," IEEE Transactions on Industrial Electronics, vol. 49, no. 4, pp.724-739, August 2002.
  3. M. Malinowski, K. Gopakumar, J. Rodriguez and M. Perez, "A Survey on Cascade Multilevel Inverters," IEEE Transaction on Industrial Electronics, vol. 57, no. 7, pp. 2197-2206, 2009. doi:10.1109/TIE.2009. 2030767.
  4. S.Nagaraja Rao, D.V.Ashok Kumar and Ch. Sai Babu, "New multilevel inverter topology with reduced number of switches using advanced modulation strategies," International Conference on Power, Energy and Control (ICPEC), 2013, pp. 693-699, 6th- 8 th Feb. 2013. doi: 10.1109/ICPEC.2013.6527745.
  5. Fang Lin Luo, "Investigation on best switching angles to obtain lowest THD for multilevel DC/AC inverters," IEEE 8th Conference on Industrial Electronics and Applications (ICIEA), 2013, pp. 1814- 1818.
  6. Shalchi Alishah R, Nazarpour D, Hosseini SH and Sabahi M. "Novel multilevel inverter topologies for medium and high-voltage applications with lower values of blocked voltage by switches," IET Power Electronics, vol. 7, no. 12, pp. 3062-3071, 2014. doi:10.1049/iet-pel.2013.0670.
  7. J. C. Caro, J. M. Ramirez, and P. M. Vite, "Novel DC-DC multilevel boost converter," in Proc. IEEE Power Electronics Specialists Conference, pp. 2146- 2156, 2008.
  8. N. Kumar, T. K. Saha, and J. Dey, "Modeling, control and analysis of cascaded inverter based grid-connected photovoltaic system," International Journal of Electrical Power & Energy Systems, vol. 78, pp. 165-173, Jun. 2016.
  9. C. D. Fuentes, C. A. Rojas, H. Renaudineau, S. Kouro, M. A. Perez and T. Meynard, "Experimental Validation of a Single DC Bus Cascaded H - Bridge Multilevel Inverter for Multistring Photovoltaic Systems," in IEEE Transactions on Industrial Electronics, vol. 64, no. 2, pp. 930-934, Feb. 2017. doi: 10.1109/TIE.2016.2619661.
  10. E. Najafi and A. H. M. Yatim, "Design and implementation of a new multilevel inverter topology," IEEE Trans. Ind. Electron., vol. 59, no. 11, pp. 4148- 4154, Nov. 2012.
  11. J. C. Rosas-Caro, J. M. Ramirez, and A. Valderrabano, "Voltage Balancing in DC/DC Multilevel Boost Converters," Proceedings of the 40th North American Power Symposium, 2008, pp. 1-7.
  12. Su, G.-J. and Adams, D.J., "Multilevel DC link inveter or brushless permanent magnet motors with very low inductance," IEEE IAS 2001 Annual Meeting, Chicago, Illinois, USA, 30 September-5 October 2001, pp. 829-834.
  13. R. Samanbakhsh and A. Taheri, "Reduction of power electronic com-ponents in multilevel converters using new switched capacitor-diode structure," IEEE Trans. Ind. Electron. , vol. 63, no. 11, pp. 7204-7214, Nov. 2016.
  14. J. Rodriguez, L. G. Franquelo, S. Kouro, J. I. Leon, R. C. Portillo, M. A. M. Prats, and M. A. Perez, "Multilevel converters: An enabling technology for high-power applications," Proc. IEEE, vol. 97, no. 11, pp. 1786-1817, Nov. 2009.
  15. Ramani K, Sathik MAJ and Sivakumar S, "A New Symmetric Cascaded Multilevel Inverter Topology Using Single and Double Source Unit," Journal of Power Electronics, vol. 15, no. 1, pp. 96-105, 2015.
  16. Maruthupandi, P., N. Devarajan, K.Sebasthirani, and J. K. Jose. "Optimum control of total harmonic distortion in field programmable gate array-based cascaded multilevel inverter," Journal of Vibration and Control, pp. 1-7, 2013.
  17. Xilinx Spartan-6 FPGA Design Manual, 2009.