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Integrated Circuit of a Peak Detector for Flyback Converter using a 0.35 um CMOS Process

0.35 um CMOS 공정을 이용한 플라이백 컨버터용 피크검출기의 집적회로 설계

  • Han, Ye-Ji (Department of Fusion Technology for Energy, Inje University) ;
  • Song, Han-Jung (Department of Fusion Technology for Energy, Inje University/Department of Nanoscience & Engineering, Inje University/Center for nano Manufactoring, Inje University)
  • 한예지 (인제대학교 에너지융합학과) ;
  • 송한정 (인제대학교 에너지융합학과/나노융합공학부/나노매뉴팩처링 연구소)
  • Received : 2016.03.04
  • Accepted : 2016.07.07
  • Published : 2016.07.31

Abstract

In this paper, a high-precision peak detector circuit that detects the output voltage information of a fly-back converter is proposed. The proposed design consists of basic analog elements with only one operational amplifier and three transistors. Because of its simple structure, the proposed circuit can minimize the delay time of the detection process, which has a strong impact on the precision of the regulation aspect of the fly-back converter. Furthermore, by using an amplifier and several transistors, the proposed detector can be fully integrated on-chip, instead of using discrete circuit elements, such as capacitors and diodes, as in conventional designs, which reduces the production cost of the fly-back converter module. In order to verify the performance of the proposed scheme, the peak detector was simulated and implemented by using a 0.35 m MagnaChip process. The gained results from the simulation with a sinusoidal stimulus signal show a very small detection error in the range of 0.3~3.1%, which is much lower than other reported detecting circuits. The measured results from the fabricated chip confirm the simulation results. As a result, the proposed peak detector is recommended for designs of high-performance fly-back converters in order to improve the poor regulation aspect seen in conventional designs.

Acknowledgement

Supported by : 한국연구재단

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