An LED lamp has been newly recognized as a new lighting system due to the performance improvement of LED. Various driving techniques for the LED lamp have been rapidly developed. Furthermore, the LED lamp as a next generation lighting system offers many advantages to lighting system designers: high efficiency, long life, design flexibility, weight reduction, modularity, ecologically friendliness, etc.
In an LED lighting system, an LED driver is one of the greatest concerns. A constant DC voltage or DC current is required to operate an LED lamp. A proper driver should be chosen for diverse application of the LED. Thus, the choice and implementation of the LED driver is very important for the achievement of a satisfactory performance level.
In these applications, power availability and power density are of paramount importance, and developments appear to be more advanced and mature than those in the lighting system industry. Furthermore, to vary the brightness of an LED lamp and satisfy many consumers’ demands, a wide range of studies for power converters with the function of dimming control have been carried out [1-4].
In the front-end stage, conventional power converters with diode rectifiers use a bulk capacitor and result in non-sinusoidal line current from the ac line source. Namely, undesired line current harmonics are generated in the distribution and transmission networks . Thus, international standards, such as IEC61000-3-2, are defined to suppress the harmonic content of the main current .
Basically, an LED driver consists of a PFC circuit, followed by a DC/DC converter that provides power to the load. This two-stage converter (Fig. 1) must satisfy the international standard of IEC61000-3-2 . As the PFC circuit, a boost converter mainly is used. The regulation of inductor current through the boost converter improves both the total harmonic distortion (THD) and the power factor (PF) of the input current . The DC/DC converter is used that performs both the function of maintaining the level of output voltage or current and isolating between the input and output of the converter. The used converter also is needed the high efficiency. Thus, to satisfy above requirements, researches in many resonant power converters have been carrying out. Specially, the LLC resonant converter frequently is chosen by lots of converter designers because of the merits of high power density, structural simplicity, miniaturization, etc [9, 10].
Fig. 1.The block diagram of conventional 2-stage LED converter
To overcome the disadvantages of two-stage converter, several types of single-stage converters were proposed to reduce switching devices, size, development and component cost . However, these converters lead to poor efficiency and power density. In order to solve these problems, the explanation and analysis for single-stage resonant converters with high power density and efficiency was to be introduced . Several types of single-stage resonant converters also were proposed [13, 14]. However, although these single-stage converters can be regulated through only one IC-chip, more power switching devices and some of inductor must be needed or added. Thus, the size of converter may be larger than the two-stage converter. In another paper , a simple single-stage resonant converter was introduced. In this paper, components in the converter are reduced but the higher voltage stress is resulted in. Thus designer must be chosen expensive power switches for high voltage.
In the lighting market, most of the consumer wants to vary the brightness of the LED lamp for various purposes. This dimming function can be achieved by changing the reference figure . However, this dimming technique needs a photocoupler. The photocoupler may be resulted in the slow operation and thus output current should be regulated as average values.
Output current can be figured out by the current value which flows in the primary side of the flyback converter. In the primary side of the flyback converter, a technique to dim output current by using at least a triac device was proposed [17, 18]. However, it has a serious problem that must be used in a low power application. Another way of dimming is pulse controlled dimming . However, it needs extra control circuits.
To overcome the above-mentioned problem, this paper proposes a dimmable single-stage asymmetrical LLC resonant converter. The proposed converter result in the low voltage stress in power switches because of the low duty cycle of the lower switch. As the result of that, the power switches with the lower voltage level may be chosen by the circuit designer. Also, the associated passive components such as capacitors, inductor and transformer can be the lower voltage level. Thus the low-cost converter can be implemented. In addition, the proposed converter does not require any extra control circuits. In order to prove the validity and performance of the proposed converter, simulation and experimental works were performed by a 300W prototype converter. The relationship between the switching frequency and output power is proved in this paper. Finally, simulation and experimental values are compared on the basis of the proposed theoretical background.
2. Principle of the Proposed Converter
The single-stage asymmetrical LLC resonant converter topology is depicted in Fig. 2. The filter inductor Lf, filter capacitor Cf are a low pass filter to cut off the high frequency of the converter and Lin is a PFC inductor of the boost cell. Also, the switches Q1, Q2 operate at the asymmetrical duty ratio 0.8, 0.2, respectively. The bus capacitors Cbus1, Cbus2 are large enough to minimize the input voltage ripples of the asymmetrical LLC resonant converter. The transformer is modeled as the magnetizing inductor Lm, the leakage inductor Lr, and an ideal transformer with a turn ratio of n:1. The leakage inductor Lr resonates with the resonant capacitor Cr which is also block the dc voltage component of the input voltage in the asymmetrical LLC resonant converter. Thus the transformer is not saturated. The capacitance of the output capacitor is chosen as the enough value so that the converter output voltage is kept up with the constant. The specific parameters are mentioned in TABLE I.
Fig. 2.Topology of the single-stage LLC resonant converter
Fig. 3 represents the detailed six switching modes for the converter operating cycle. Also, theoretical waveforms of the proposed converter are shown in Fig. 4.
Fig. 3.Operation mode of the single-stage asymmetrical LLC resonant converter
Fig. 4.Main waveform of the single-stage asymmetrical LLC resonant converter
A. Mode 1 (t0 ~ t1): The mode begins when Q2 is turned on at t = t0 by the ZVS. The PFC inductor Lin is charged by the input voltage Vg. The PFC inductor current iLin flowing through the PFC inductor Lin increases linearly. At this moment, the magnetizing current im also starts to flow through switch Q2. The input voltage Vin of the LLC resonant converter is reversed against the voltage Vcbus2. Thus, the magnetizing current im is decreased and the energy of Cbus2 is transferred to the resonant part Lr, Cr. The output current of transformer becomes the difference between iLr and im.
B. Mode 2 (t1 ~ t2): Q2 is turned off at t = t1 and then both switch Q1 and Q2 is turned off. At this time, the PFC inductor current iLin starts to fall because the inductor voltage becomes Vc–Vg. The bus capacitors Cbus1, Cbus2 are charged by the PFC inductor. At the same time, the magnetizing current im flows through the diode of Q1. The current leads to the condition of the zero voltage switching for Q1.
C. Mode 3 (t2 ~ t3): Q1 is turn on at t2 by the zero voltage switching. The input voltage of the LLC resonant converter is the voltage Vcbus1. At this moment, the voltage of the leakage inductor in the transformer is also changed. Hence, the leakage inductor current rises.
D. Mode 4 (t3 ~ t4) : When the direction of leakage inductor current is changed, the voltage of the magnetizing inductor Lm becomes the positive voltage. Thus the magnetizing current is increased. During this time, the current of the PFC inductor is reached zero and this zero current is maintained until time t6. Hence, the power loss of the PFC inductor keeps up with the value of zero during this time. After the PFC inductor current is reached at zero, the magnetized current only is flowed into the switch Q1. This magnetized current is being continuously flowed because of the transformer with relatively small magnetizing inductance. Consequently, the condition of ZVS for Q2 can be obtained. At this interval, the leakage inductor resonates with resonant capacitor. The resonant current flows through the secondary side of the transformer.
E. mode 5 (t4 ~ t5): At t = t4, the secondary current of the transformer is approached zero. It means that the reverse recovery current of the rectifier diode Drec2 is eliminated. Thus, the proposed converter has low switching loss.
F. mode 6 (t5 ~ t6): At t = t5, Q1 is turned off, the magnetizing current is flowed in Q2’s diode. The condition of ZVS for Q2 is accomplished.
3. Analysis of Voltage Conversion Ratio Versus Duty Ratio to Reduce Switch Voltage Stress in the DCM PFC
Fig. 2 shows the single-stage LLC resonant converter. The single-stage LLC resonant converter consists of a boost-type PFC cell and the asymmetrical LLC resonant dc/dc converter cell. The boost-type cell working in the DCM provides low input current harmonics without additional current-shaping controller in compliance with IEC61000-3-2 class C regulations .
The voltage stress of the switches is related to the dc-bus voltage Vc by the Kirchhoff’s voltage law (KVL), where Vc= Vcbus1+Vcbus2 is the dc-bus voltage. Therefore, to reduce the voltage stress of switches, the dc-bus voltage reduction is necessary.
Defining the AC source voltage vac(t) = Vm sinwlt, the rectified output voltage is Vg(t) = |Vm sin wlt|, where wl is the line angular frequency(wl=2πfl), fl is the line frequency, and Vm is the peak line voltage.
Fig. 5 depicts the theoretical DCM inductor current wave form during the switching period. When the lower switch Q2 is turned on for the duration DTs, the slope of inductor current is Vg/Lin.
Fig. 5.Theoretical DCM inductor current waveform during the switching period
The slope of inductor current is (Vc–Vg)/Lin when the lower switch is turned off and the diode are conducted during subinterval D2Ts. The peak current Ipeak.DTs and the peak current Ipeak.D2Ts are, respectively
Since the currents Ipeak.DTs and Ipeak.D2Ts are the same, the voltage conversion ratio M can be expressed as
However, another equation is needed to eliminate D2 because of the unknown subinterval duty ratio D2 in equations (1) and (2). From the diode current ID1 of the upper switch, another equation can be obtained.
Substitution of (1) into (4), one obtains
where, RALLC is equivalent resistance of the asymmetrical LLC resonant converter.
Elimination of D2 from (3) and (5), and solution for the voltage conversion ratio M(D,K), yields
where, K = 2Lin / (RALLC·Ts) .
According to (6), the voltage conversion ratio versus the duty ratio of the lower switch Q2 could be derived, and these characteristics are plotted in Fig. 6. It is assumed the equivalent resistance of the asymmetrical LLC resonant converter is constant. It can be seen that the characteristics of the DCM boost converter becomes be nearly linear. That means it can be reduced voltage conversion ratio when operated at low duty cycle . The voltage stress across the power switches is the dc bus voltage Vc. Therefore, power switches of converter have low voltage stress at the low duty ratio of the lower switch Q2.
Fig. 6.The voltage ratio versus the duty ratio of the lower switch Q2 in the DCM
4. Analysis of Dimming Method Through Frequency Control
To reduce the voltage stress of the switches, the low duty ratio of the lower switch Q2 should be designed and fixed. To dim of the LED lighting by the control of the switching frequency, the analysis for the average output voltage of the primary bridge diode and the average current of the PFC inductor per a period Tl (a reciprocal of the line frequency) is developed in this chapter.
The average value of Vg can be obtained .
To obtain the average current of the inductor during a period Tl, two steps are needed. First, using the triangle area formula, the average current of the PFC inductor current during a switching period could be obtained as follows
Substitution of (1) and (3) into (8) leads to
Rewriting the equation (9) and using Vg(t) = |Vmsinwlt|,
To derive the average current during the period Tl of the PFC inductor, integration leads to
where, α = Vm / Vc .
Solution for the input power then leads to
Substitution of (7) and (12) into (13) result in
From (14), the input power is in inverse proportion to the switching frequency. Therefore, the brightness of the LED lamp can be controlled through the variation of the switching frequency. A control law for the LED dimming is obtained by (14).
Finally, Fig. 7 shows a block diagram of the controller. The controller is implemented by (14). For the dimming of the LED lighting, PWM signals having the frequency corresponding to the desired output are artificially generated from the microcontroller and transferred to the gate terminal of the switching device. Since the controller is simple, it can be easily implemented using most modern micro-controllers, digital signal processors and analog devices.
Fig. 7.A block diagram of the controller
5. The Verification of the Proposed Converter
To verify the feasibility of the proposed converter, simulation and experimental results from a 300W prototype are provided. The parameters of the prototype are given in Table 1.
Table 1.The parameter of the proposed converter
5.1 The simulation results
The proposed converter was simulated using the POWERSIM package. The input voltage and the current are shown in Fig. 8 that the horizontal time axis is 10msec per a division. Also, the measured line current waveform has the power factor of 0.988 and total harmonic distortion of 15.56%. The input current Iac contains third harmonics because of ratio of the input voltage and the output voltage of the boost type cell .
Fig. 8.The simulation waveforms of the input voltage, current of the converter under the full load
Fig. 9 shows the output voltages of the DCM PFC boost cell under the full load. In the proposed converter, the average bus voltage is about 500 V. However, the average bus voltage conventional converter is about 820 V. Thus, the proposed converter has the lower voltage stress across switching devices.
Fig. 9.The simulation waveforms of the bus capacitors voltage Vc of the converter under the full load
5.2 The experimental results
The output power is rated at 300W, the input voltage is 220Vrms and the load is the LED, the steady-state driving parameters of which are 150mA/9.5V. A LED module consists of 9 LED rings and 6 LEDs per rings. Four LED modules are used as the load of the converter .
A prototype for the proposed system has been built as shown in Fig. 10. In the proposed converter, the leakage inductance for the resonance inductor is included in the transformer to reduce passive components.
Fig. 10.The prototype of the proposed converter
Fig. 11 and 12 are the currents and voltages of the converter with the LED load under the full load and half load, respectively. Accordingly, the waveforms of the LED current are varied by the switching frequency adjustment. Also, the phenomenon of flicker in the LED lamp does not observed through the experimental works because of the almost constant LED current without ripples.
Fig. 11.Experimental waveforms under the full load CH1: LED current ILED (5A/div), CH2: input current iac (2A/div), CH3: LED voltage VLED (50V/div), CH4: input voltage Vac (250V/div))
Fig. 12.Experimental waveforms under the half load. CH1: LED current ILED (5A/div), CH2: input current iac (2A/div), CH3: LED voltage VLED (50V/div), CH4: input voltage Vac (250V/div)
In Fig. 13, the bus voltage waveform of the DCM PFC boost cell under the full load is shown. It can be seen that the average voltage of sum of bus capacitors Cbus1, Cbus2 is about 500V. It means voltage stress of power switches is approximately 500V.
Fig. 13.Experimental waveform of the dc bus voltage under the full load CH4: dc bus voltage Vc (100V/div)
Fig. 14 and 15 shows the drain-to-source voltage of primary switches Q1 and Q2. It can be shown that the ZVS condition improve the overall conversion efficiency.
Fig. 14.The ZVS waveforms of the top switch under the full load (CH3: Top switch voltage, Vtop.ds (100V/div), CH4: Top switch gate voltage Vtop.gs (2.5V/div))
Fig. 15.The ZVS waveforms of the switch under the full load. (CH3: Bottom switch voltage, Vbottom.ds (100V/div), CH4: Bottom switch gate voltage Vbottom.gs (2.5V/div))
Fig. 16 shows the harmonics spectrums of the input current at vac=220Vrms under the load variation. Each measured harmonic component meets the IEC61000-3-2 Class C requirement, as shown in Fig. 16. The THDs are 19.07% (at load variation 100%), 16.51% (at 72%), 20.34% (at 58%), 19.07% (at 44%), 25.71% (at 41%), 25.71% (at 33%) and 25.71% (at 32%), respectively.
Fig. 16.The harmonics spectrum of the input current of the proposed converter under the load variation
The bus voltage of the DCM PFC boost cell, power factor and conversion efficiency for the laboratory prototype are measured and shown in Fig. 17. The bus voltage of DCM PFC boost cell is measured about 500V under the full load. Also, almost unity power factor is obtained under various load conditions.
Fig. 17.The bus voltage Vc, power factor and efficiency under load variation
The highest conversion efficiency is measured about 87% at full load.
Fig. 18 is the curve of the output power versus the applied switching frequencies and also exhibits the theoretically calculated results in (14), the simulated results by the simulation tool and the experimental results. These results show that the verification of dimming method controlled by the switching frequency is proved.
Fig. 18.The curve of the output power versus the applied switching frequencies
In this paper, a dimmable single-stage asymmetrical LLC resonant converter was proposed. The proposed converter result in the low voltage stress in power switches because of the low duty cycle of the lower switch. For the dimming control of the LED lamp, the effective input power was analyzed through the terms of both the input inductor current and the output voltage of the rectifier diode. A related equation for the switching frequency was induced.
The proposed converter has been verified through the actual experimental works. Furthermore, the unit power factor was achieved and the required standard of the IEC61000-3-2 Class C was satisfied.