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An Efficient Hardware Implementation of Lightweight Block Cipher LEA-128/192/256 for IoT Security Applications

IoT 보안 응용을 위한 경량 블록암호 LEA-128/192/256의 효율적인 하드웨어 구현

  • Received : 2015.04.03
  • Accepted : 2015.05.12
  • Published : 2015.07.31

Abstract

This paper describes an efficient hardware implementation of lightweight encryption algorithm LEA-128/192/256 which supports for three master key lengths of 128/192/256-bit. To achieve area-efficient and low-power implementation of LEA crypto- processor, the key scheduler block is optimized to share hardware resources for encryption/decryption key scheduling of three master key lengths. In addition, a parallel register structure and novel operating scheme for key scheduler is devised to reduce clock cycles required for key scheduling, which results in an increase of encryption/decryption speed by 20~30%. The designed LEA crypto-processor has been verified by FPGA implementation. The estimated performances according to master key lengths of 128/192/256-bit are 181/162/109 Mbps, respectively, at 113 MHz clock frequency.

Keywords

Lightweight Encryption Algorithm;LEA;IoT Security;Information Security;Secret Key Encryption

Cited by

  1. An Efficient Hardware Implementation of Lightweight Block Cipher Algorithm CLEFIA for IoT Security Applications vol.20, pp.2, 2016, https://doi.org/10.6109/jkiice.2016.20.2.351

Acknowledgement

Grant : 사물인터넷 기반 영상보안용 초저전력 SoC 핵심 IP 기술 개발