Test Vector Generator of timing simulation for 224-bit ECDSA hardware

224비트 ECDSA 하드웨어 시간 시뮬레이션을 위한 테스트벡터 생성기

  • Kim, Tae Hun (Security Development & Operation Team, KEPCO KDN Co. Ltd.) ;
  • Jung, Seok Won (Dept. of Information Security Engineering, Mokpo National University)
  • Received : 2015.12.09
  • Published : 2015.12.30


Hardware are developed in various architecture. It is necessary to verifying value of variables in modules generated in each clock cycles for timing simulation. In this paper, a test vector generator in software type generates test vectors for timing simulation of 224-bit ECDSA hardware modules in developing stage. It provides test vectors with GUI format and text file format.


Supported by : 한국에너지기술평가원(KETEP)


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