A Code-level Parallelization Methodology to Enhance Interactivity of Smartphone Entertainment Applications

스마트폰 엔터테인먼트 애플리케이션의 상호작용성 개선을 위한 코드 수준 병렬화 방법론

  • Kim, Byung-Cheol (Information and Culture Technology Studies, Seoul National University)
  • 김병철 (서울대학교 정보문화학전공)
  • Received : 2015.10.24
  • Accepted : 2015.12.20
  • Published : 2015.12.28


One of the fundamental requirements of entertainment applications is interactivity with users. The mobile device such as the smartphone, however, does not guarantee it due to the limit of the application processor's computing power, memory size and available electric power of the battery. This paper proposes a methodology to boost responsiveness of interactive applications by taking advantage of the parallel architecture of mobile devices which, for instance, have dual-core, quad-core or octa-core. To harness the multi-core architecture, it exploits the POSIX thread, a platform-independent thread library to be able to be used in various mobile platforms such as Android, iOS, etc. As a useful application example of the methodology, a heavy matrix calculation function was transformed to a parallelized version which showed around 2.5 ~ 3 times faster than the original version in a real-world usage environment.


Smartphone Applications;Parallelization;Thread;POSIX;Matrix Calculation


  1. G. Blake, R. G. Dreslinski and T. Mudge, "A Survey of Multicore Processors," IEEE Signal Processing, Vol. 26, No. 6, pp. 26-37, 2009.
  2. W. Wolf, "Multiprocessor System-on-Chip Technology", IEEE Signal Processing, Vol. 26, No. 6, pp. 50-54, 2009.
  3. D. B. Skillicorn, "Architecture-Independent Parallel Computation," IEEE Computer, Vol. 23, No. 12, pp. 38-50, 1990.
  4. M. Cole, "Algorithmic Skeletons: structured management of parallel computations," MIT Press, 1989.
  5. J. Kepner and J. Lebak, "Software technologies for high-performance parallel signal processing," Lincoln Laboratory Journal, Vol. 14, no. 2, pp. 181-198, 2003.
  6. M. Leyton, J. M. Piquer. "Skandium: Multi-core Programming with algorithmic skeletons", IEEE Euro-micro PDP 2010.
  7. H. Gonzalez-Velez and M. Leyton, "A survey of algorithmic skeleton frameworks: high-level structured parallel programming enablers," Software-Practice & Experience, Vol. 40 No. 12, pp. 1135-1160, 2010.
  8. N. Khammassi et al. "MHPM: Multi-Scale Hybrid Programming Model: A Flexible Parallelization Methodology," High Performance Computing and Communication, pp. 71-80, 2012.
  9. M. Steuwer et al., "Generating performance portable code using rewrite rules: from high-level functional expressions to high-performance OpenCL code," Proc. of the 20th ACM SIGPLAN Int'l Conference on Functional Programming, pp. 205-217, 2015.
  10. Intel Corporation. Threading Building Blocks, Tutorial Rev. 1.6, 2015)
  11. J. Chong et al., "Efficient Parallelization of H.264 Decoding with Macro Block Level Scheduling," Proceedings of 2007 IEEE International Conference on Multimedia and Expo, pp. 1874 - 1877, 2007.
  12. Rob Hess, "An Open-Source SIFT Library," Proceedings of the 18th ACM Int'l Conference on Multimedia (MM'10), pp. 1493-1496, 2010.
  13. E. Anderson et al., "LAPACK Users' Guide (3rd Ed.)," Philadelphia, PA: Society for Industrial and Applied Mathematics, 1999.
  14. OpenCV GEMM (GEneralized Matrix Mult.),
  15. A. Nicolau and A. Kejariwal, "How many threads to spawn during program multithreading?" Proc. of the 23rd international conference on Languages and compilers for parallel computing, pp. 166-183, 2010.