- Volume 13 Issue 11
DOI QR Code
Soft error correction controller for FPGA configuration memory
FPGA 재구성 메모리의 소프트에러 정정을 위한 제어기의 설계
- Baek, Jongchul (Department of Computer Science and Engineering, Chungnam National University) ;
- Kim, Hyungshin (Department of Computer Science and Engineering, Chungnam National University)
- Received : 2012.07.27
- Accepted : 2012.11.08
- Published : 2012.11.30
FPGA(Field Programmable Gate Array) devices are widely used due to their merits in circuit development time, and development cost. Among various FPGA technologies, SRAM-based FPGAs have large cell capacity so that they are attractive for complex circuit design and their reconfigurability. However, they are weak in space environment where radiation energy particles cause Single Event Upset(SEU). In this paper, we designed a controller supervising SRAM-based FPGA to protect configuration memory inside. The controller is implemented on an Anti-Fusing FPGA. Radiation test was performed on the implemented computer board and the result show that our controller provides better SEU-resilience than TMR-only system.
Soft error correction;Single event upset;Configuration memory;FPGA
Supported by : 한국연구재단
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