A Study of Reuse Module Generation Algorithm consider the Power Consumption for FPGA Technology Mapping

FPGA 기술 매핑을 위한 소모 전력을 고려한 재사용 모듈 생성 알고리즘에 관한 연구

  • 윤충모 (서일대학 정보전자과) ;
  • 김재진 (극동정보대학 컴퓨터정보과)
  • Published : 2007.12.31

Abstract

In this paper, reuse module generation algorithm consider the power consumption for FPGA technology mapping is proposed. To proposed algorithm is RT library generating algorithm, consider power consumption for reuse module using FPGA technology mapping. In the first, selected FPGA for power consumption calculation. Technology mapping process have minimum total power consumption consider LUT's constraint in selected FPGA. A circuit into device by selected proper modules of allocation result for power consumption constraint using data.

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