DOI QR코드

DOI QR Code

Impact of Post Gate Oxidation Anneal on Negative Bias Temperature Instability of Deep Submicron PMOSFETs

게이트 산화막 어닐링을 이용한 서브 마이크론 PMOS 트랜지스터의 NBTI 향상

  • 김영민 (홍익대학교 전자전기공학부)
  • Published : 2003.03.01

Abstract

Influence of post gate oxidation anneal on Negative Bias Temperature Instability (NBTI) of PMOSFE has been investigated. At oxidation anneal temperature raised above 950$^{\circ}$C, a significant improvement of NBTI was observed which enables to reduce PMO V$\_$th/ shift occurred during a Bias Temperature (BT) stress. The high temperature anneal appears to suppress charge generations inside the gate oxide and near the silicon oxide interface during the BT stress. By measuring band-to-band tunneling currents and subthreshold slopes, reduction of oxide trapped charges and interface states at the high temperature oxidation anneal was confirmed.

References

  1. Symp. on VLSI Technology NBTI enhancement by nitrogen incorporation into ultrathin gate oxide for 0.1 um gate CMOS generation N. Kimizuka;K. Yamaguchi;K. Imai
  2. IEEE Tran on Electron Devices v.46 no.5 Bias temperature instability in scaled $P^+$ polysilicon gate pMOSFET's T. Yamamoto;K. Uwasawa;T. Mogami https://doi.org/10.1109/16.760398
  3. IRPS 2002 Impact of negative bias temperature instability on digital circuit reliability V. Reddy;A. Krishnan;A. Marchall;J. Rodriguez
  4. Symp. on VLSI Technology A strategy using a copper/low k BEOL process to prevent negative bias temperature instability (NBTI) in PMOSFET A. Suzuki;K. Tabuchi;H. Kimura
  5. 전기전자재료학회 논문지 v.15 no.3 쌍극 폴리-금속 게이트를 적용한 CMOS 트랜지스터의 특성 장성근 https://doi.org/10.4313/JKEM.2002.15.3.233
  6. 전기전자재료학회 논문지 v.7 no.1 $N_2O$가스로 재산화시킨 oxynitride막의 특성 김태형;김창일;최동진;장의구
  7. 전기전자재료학회 논문지 v.6 no.3 $N_2O$가스로 열산화된 게이트 산화막의 특성 이철인;최현식;서용진;김창일;김태형;장의구
  8. J. Electrochem. Soc. v.137 no.11 Annealing characteristics of ultrathin silicon oxides grown at low temperatures S. Tay;A. Kalnitsky;G. Kelly https://doi.org/10.1149/1.2086271
  9. IEEE Electron Device Lett v.9 no.11 Leakage current degradation in nMOSFET's due to hot electron stress C. Duvvury;D. Redwine;H. Stiegler https://doi.org/10.1109/55.9282
  10. IEEE Trans. Electron Devices v.40 The effect of oxide charges at LOCOS isolation edges on oxide breakdown H. Uchida;N. Hirashita;T. Ajioka https://doi.org/10.1109/16.277339
  11. J. Electrochem. Soc v.129 no.11 A viscous flow model to explain the appearance of high density thermal SiO2 at low oxidation temperatures E. Irene;E. Tierney;J. Angillelo https://doi.org/10.1149/1.2123617