Abstract

This paper describes on the fabrication of a SOI substrate by SDB technology and electrochemical etch-stop. The surface of the thinned SDB SOI substrate is more uniform than that of grinding or polishing by mechanical method and this process was found to be a very accurate method for SOI thickness control. During electrochemical etch-stop leakage current versus voltage curves were measured for analysis of the open current potential(OCP) point the passivation potential(PP) point and anodic passivation potential. The surface roughness and the controlled thickness selectivity of the fabricated a SDB SOI substrate were evaluated by using AFM and SEM respectively.

Keywords

• Electrochemical etch-stop;
• SDB SOI;
• Thickness control;
• Surface flatness

• 전기화학적 식각정지;
• 실리콘기판 직접접합 에스오아이;
• 두께제어;
• 표면평탄도;

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References

1. IEEE Solid-State Sensors & Actuators Workshop A pressure-balanced electrostatically actuated microvalve M. Huff(et. al.)
2. IEEE Solid-State Sensors & Actuators Workshop A monolithic silicon accelerometer with integral air damping and overrange protection P. Barth(et. al.)
3. IEEE Electron Device letter v.EDL-2 MOSFET's on silicon prepared by moving melt zone recrystallization of encapsulated polycrystalline silicon on an insulating substrate E.W. Maby(et. al.)
4. Appl. Phys. letter v.53 Epitaxial Al₂O₃ films on Si by low-pressure chemical vapor deposition M. Ishida(et. al.)
5. Jpn. J. Appl. Phys. v.20 Multiple SOI structure fabricated by high dose oxygen implantation and epitaxial growth Y. Irita(et. al.)
6. Jpn. J. Appl. Phys. v.29 Silicon wafer bonding mechanism for silicon-on-insulator structures T. Abe(et. al.)
7. Sensors & Actuators A v.54 Fabrication of SOI wafers with buried cavities using silicon fusion bonding and electrochemical etchback J.M. Noworolski(et. al.)
8. Appl. Phys. letter A v.54 Formation of interface bubbles in bonded silicon wafers: A thermodynamic model K. Mitani(et. al.)
9. Kluwer Academic Electrical characteristics on of silicon on insulator materials and device S. Cristoloveanu(et. al.)
10. 5th Int. Workshop on Future Electronics Devices A computer controlled polishing system for silicon-on-insulator(SOI) A. Yamada(et. al.)
11. J. Electrochem. Soc. v.139 Investigation of buried etch stop layer in silicon made by nitrogen implantation A. Soderarg
12. J. Korea Sensors Society v.7 A study on electrochemical etch-stop in TMAH/IPA/ pyrazine solutions G.S. Chung(et. al.)
13. J. KIEE v.47 The effect of pyrazine on TMAH/IPA/pyrazine silicon anisotropic etching characteristics G.S. Chung(et. al.)
14. J. Korea Sensors Society v.9 A study on prebonding according to HF pre-treatment conditions in Si wafer direct bonding G.S. Chung(et. al.)
15. Proceedings of SPIE v.3892 Fabrication of highyield Si microdiaphragms using electrochemical etch-stop in TMAH/IPA/ pyrazine solutions G.S. Chung(et. al.)
16. J. KIEEME v.10 Si anisotropic etching characteristics of TMAH/IPA G.S. Chung(et. al.)