Effects of Electrical Stress on Polysilicon TFTs with Hydrogen Passivation

다결정 실리콘 박막 트랜지스터의 수소화에 따른 전기적 스트레스의 영향

  • 황성수 (삼화전자공업주식회사 R&D센터 연구원) ;
  • 황한욱 (명지대 전기공학과) ;
  • 김용상 (명지대 전기정보제어공학부)
  • Published : 1999.05.01

Abstract

We have investigated the effects of electrical stress on poly-Si TFTs with different hydrogen passivation conditions. The amounts of threshod voltage shift of hydrogen passivated poly-Si TFTs are much larger than those of as-fabricated devices both under the gate only and the gate and drain bias stressing. Also, we have quantitatively analyzed the degradation phenomena by analytical method. We have suggested that the electron trapping in the gate dielectric is the dominant degradation mechanism in only gate bias stressed poly-Si TFT while the creation of defects in the channel region and $poly-Si/SiO_2$ interface is prevalent in gate and drain bias stressed device.

Keywords

Hydrogenation;Polycrystalline Silicon;Thin-film transistor;Degradation;Defect creation;Charge trapping

References

  1. Semicond. Sci. Technol. v.5 State creation and hole trapping in polycrystalline silicon thin film transistors at high drain bias N. D. Young;A. Gill
  2. IEEE Electron Device Lett. v.10 Effects of trap-state density reduction by plasma hydrogenation in low-temperature poly-Si thin film transistors I. W. Wu;A. G. Lewis;T. Y. Huang;A. Chiang
  3. IEEE Electron Device Lett. v.9 Characteristics of offset-structure polycrystalline-silicon thin-film transistors K. Tanaka;H. Arai;S. Kohda
  4. Appl. Phys. Lett. v.48 no.2 Simple technique for seperating the effects of interface traps and trapped oxide charge in metal-oxide-semicon-ductor transistors P. J. McWhorter;P. S. Winokur
  5. IEEE Electron Device Lett. v.16 no.6 Degradation due to Electrical stress in Poly-Si Thin Film Transistors with Various LDD lengths Y. S. Kim;M. K. Han
  6. Proc. IEEE v.55 Effect of Ionization Radiation on Oxidized Silicon Surfaces and Planar Devices E. H. Snow;A. S. Grove;D. J. Fitzgerald
  7. Jpn. J. Appl. Phys. v.34 Different hydrogenation passivation effects on low-temperature and high-temperature processed poly-Si TFTs Y. S. Kim;K. Y. Choi;M. K. Han
  8. IEEE Trans. Electron Devices v.40 no.5 Physical Models for Degradation Effects in Polysilicon Thin-Film Transistors M. Hack;A. G. Lewis;I. W. Wu
  9. IEDM 91 Relation between Hot-Carrier Light Emission and Kink Effect in Poly-Si Thin Film Transistors M. Koyanagi;H. Kurino;T. Hashimoto;H. Mori;K. Hata;Y. Hiruma
  10. IEDM 92 Degradation Mechanism of Polysilicon TFTs under D.C. Stress Noriji Kato;Takayuki Yamada;So Yamada;Takeshi Nakamura;Toshihisa Hamano
  11. IEEE Trans. Electron Devices v.32 Anomalous Leakage Current in LPCVD Polysilicon MOSFETs G. Fossum;A. Oritz-Conde
  12. IEEE Trans. Electron Devices v.ED-36 A new address scheme to improve the display quality of a-Si TFT/LCD panel Y. Kaneko;Y. Tanaka;N. Kabuto;T. Tsukada