Design and implementation of simulator for fault coverage analysis of commuication protocol test case

통신 프로토콜 시험항목의 오류 발견 능력 분석을 위한 시뮬레이터의 설계 및 구현

  • 김광현 (광주대학교 전자계산학과) ;
  • 허기택 (동신대학교 컴퓨터학과) ;
  • 이동호 (광운대학교 전자계산학과)
  • Published : 1997.08.01

Abstract

In this ppaer, fault coverage analysis of a conformance test case for communication protocols, specified as a deterministic finite state machine(DFSM) is presented. The fault coverage analysis of a test case is defined by measuring the extent of the faults detected using a generated test case. The method that evaluates fault coverage analysis for a test case, has been researched by arithmetic analysis and simulation. In this paper, we designed and implemented a simulator for fault coverage analysis of a communication protocol teat case. With this result for Inres protocol, output fault and state merge and split fault have a high fault coverage of 100%. This simulator can be widely used with new fault coverage analysis tools by applying it to various protocols.

Keywords

References

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