Design of a 2.4GHz 2 stage Low Noise Amplifier for RF Front-End In a 0.35${\mu}{\textrm}{m}$ CMOS Technology

  • Kwon, Kisung (Dept. of Semiconductor Science Dongguk University) ;
  • Hwang, Youngseung (Dept. of Semiconductor Science Dongguk University) ;
  • Jung, Woong (Dept. of Semiconductor Science Dongguk University)
  • 발행 : 2002.11.01

초록

3 V, 2.46GHz Low Noise Amplifier (LNA) have been designed for standard 0.35$\mu\textrm{m}$ CMOS process with one poly and four metal layers. This design includes on-chip biasing, matching network and multilayer spiral inductors. The single-ended amplifier provides a forward gain of 20.5dB with a noise figure 3.35dB, and an IIP3 of -6dBm while drawing 59mW total Power consumption